传输线脉冲应力下芯片级硅基 MOSFET 中点状缺陷的演变

IF 2.9 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Xinyuan Zheng;Huiying Li;Yibo Ning;Chengbing Pan;Kai Wang;Lixia Zhao
{"title":"传输线脉冲应力下芯片级硅基 MOSFET 中点状缺陷的演变","authors":"Xinyuan Zheng;Huiying Li;Yibo Ning;Chengbing Pan;Kai Wang;Lixia Zhao","doi":"10.1109/TED.2024.3466840","DOIUrl":null,"url":null,"abstract":"In this study, the electrical performance and evolution of point defects in chip-level Silicon-based MOSFET under transmission line pulse (TLP) stress were investigated. The experimental results show that the threshold voltage decreased by 9.8%, and the output saturation current increased by 5.9% after the stress. An intrinsic point defect with an energy level of \n<inline-formula> <tex-math>$0.25~\\pm ~0.05$ </tex-math></inline-formula>\n eV in Si-based MOSFET chips was observed by using deep-level transient spectroscopy (DLTS), which shifted to \n<inline-formula> <tex-math>$0.37~\\pm ~0.05$ </tex-math></inline-formula>\n eV after the stress. The increase of the trap energy level would reduce the holes at the Si/SiO2 interface, and herein the threshold voltage reduced. This work helps to further understand the evolution of point defects in Si-based MOSFET chips.","PeriodicalId":13092,"journal":{"name":"IEEE Transactions on Electron Devices","volume":"71 11","pages":"6958-6962"},"PeriodicalIF":2.9000,"publicationDate":"2024-10-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Evolution of Point Defects in Chip-Level Silicon-Based MOSFET Under Transmission Line Pulse Stress\",\"authors\":\"Xinyuan Zheng;Huiying Li;Yibo Ning;Chengbing Pan;Kai Wang;Lixia Zhao\",\"doi\":\"10.1109/TED.2024.3466840\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this study, the electrical performance and evolution of point defects in chip-level Silicon-based MOSFET under transmission line pulse (TLP) stress were investigated. The experimental results show that the threshold voltage decreased by 9.8%, and the output saturation current increased by 5.9% after the stress. An intrinsic point defect with an energy level of \\n<inline-formula> <tex-math>$0.25~\\\\pm ~0.05$ </tex-math></inline-formula>\\n eV in Si-based MOSFET chips was observed by using deep-level transient spectroscopy (DLTS), which shifted to \\n<inline-formula> <tex-math>$0.37~\\\\pm ~0.05$ </tex-math></inline-formula>\\n eV after the stress. The increase of the trap energy level would reduce the holes at the Si/SiO2 interface, and herein the threshold voltage reduced. This work helps to further understand the evolution of point defects in Si-based MOSFET chips.\",\"PeriodicalId\":13092,\"journal\":{\"name\":\"IEEE Transactions on Electron Devices\",\"volume\":\"71 11\",\"pages\":\"6958-6962\"},\"PeriodicalIF\":2.9000,\"publicationDate\":\"2024-10-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Electron Devices\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10706112/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Electron Devices","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10706112/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

本研究对传输线脉冲(TLP)应力下芯片级硅基 MOSFET 的电气性能和点缺陷的演变进行了研究。实验结果表明,应力作用后,阈值电压降低了 9.8%,输出饱和电流增加了 5.9%。利用深电平瞬态光谱(DLTS)观察到硅基 MOSFET 芯片中存在一个能级为 0.25~pm ~0.05$ eV 的本征点缺陷,在应力作用后,该能级转移到了 0.37~pm ~0.05$ eV。阱能级的增加会减少硅/二氧化硅界面上的空穴,从而降低阈值电压。这项工作有助于进一步了解硅基 MOSFET 芯片中点缺陷的演变。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Evolution of Point Defects in Chip-Level Silicon-Based MOSFET Under Transmission Line Pulse Stress
In this study, the electrical performance and evolution of point defects in chip-level Silicon-based MOSFET under transmission line pulse (TLP) stress were investigated. The experimental results show that the threshold voltage decreased by 9.8%, and the output saturation current increased by 5.9% after the stress. An intrinsic point defect with an energy level of $0.25~\pm ~0.05$ eV in Si-based MOSFET chips was observed by using deep-level transient spectroscopy (DLTS), which shifted to $0.37~\pm ~0.05$ eV after the stress. The increase of the trap energy level would reduce the holes at the Si/SiO2 interface, and herein the threshold voltage reduced. This work helps to further understand the evolution of point defects in Si-based MOSFET chips.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
IEEE Transactions on Electron Devices
IEEE Transactions on Electron Devices 工程技术-工程:电子与电气
CiteScore
5.80
自引率
16.10%
发文量
937
审稿时长
3.8 months
期刊介绍: IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信