28 纳米全集成 5510-μm² 工艺监控器和阈值电压提取电路

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Solid-State Circuits Letters Pub Date : 2024-09-11 DOI:10.1109/LSSC.2024.3457768

Ido Shpernat;Asaf Feldman;Joseph Shor

{"title":"28 纳米全集成 5510-μm² 工艺监控器和阈值电压提取电路","authors":"Ido Shpernat;Asaf Feldman;Joseph Shor","doi":"10.1109/LSSC.2024.3457768","DOIUrl":null,"url":null,"abstract":"A new architecture of an on-die process monitor circuit is demonstrated in 28 nm. The proposed circuit can extract the threshold voltage, \n<inline-formula> <tex-math>$V_{\\mathrm { TH,}}$ </tex-math></inline-formula>\n and random mismatch of a transistor using multiple extraction methods, including the second derivative method. A sigma-delta modulator analog-to-digital converter samples the output to enable on-die processing of the results. A \n<inline-formula> <tex-math>$V_{\\mathrm { DS}}$ </tex-math></inline-formula>\n voltage control loop enables \n<inline-formula> <tex-math>$V_{\\mathrm { TH}}$ </tex-math></inline-formula>\n extraction in both the linear and saturation regions of the device. The circuit has a compact area of \n<inline-formula> <tex-math>$5510~\\mu $ </tex-math></inline-formula>\nm2.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"7 ","pages":"279-282"},"PeriodicalIF":2.2000,"publicationDate":"2024-09-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A Fully Integrated 5510-μm² Process Monitor and Threshold Voltage Extractor Circuit in 28 nm\",\"authors\":\"Ido Shpernat;Asaf Feldman;Joseph Shor\",\"doi\":\"10.1109/LSSC.2024.3457768\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new architecture of an on-die process monitor circuit is demonstrated in 28 nm. The proposed circuit can extract the threshold voltage, \\n<inline-formula> <tex-math>$V_{\\\\mathrm { TH,}}$ </tex-math></inline-formula>\\n and random mismatch of a transistor using multiple extraction methods, including the second derivative method. A sigma-delta modulator analog-to-digital converter samples the output to enable on-die processing of the results. A \\n<inline-formula> <tex-math>$V_{\\\\mathrm { DS}}$ </tex-math></inline-formula>\\n voltage control loop enables \\n<inline-formula> <tex-math>$V_{\\\\mathrm { TH}}$ </tex-math></inline-formula>\\n extraction in both the linear and saturation regions of the device. The circuit has a compact area of \\n<inline-formula> <tex-math>$5510~\\\\mu $ </tex-math></inline-formula>\\nm2.\",\"PeriodicalId\":13032,\"journal\":{\"name\":\"IEEE Solid-State Circuits Letters\",\"volume\":\"7 \",\"pages\":\"279-282\"},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2024-09-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Solid-State Circuits Letters\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10677414/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10677414/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}

引用次数: 0

摘要

演示了 28 纳米晶圆上工艺监控电路的新架构。所提出的电路可以使用多种提取方法（包括二次导数法）提取阈值电压、$V_{\mathrm { TH,}}$ 和晶体管的随机失配。Σ-Δ调制器模数转换器对输出进行采样，以便对结果进行片上处理。一个 $V_{\mathrm { DS}}$ 电压控制环路可在器件的线性和饱和区进行 $V_{\mathrm { TH}}$ 提取。电路面积仅为 5510~\mu $ m2。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

A Fully Integrated 5510-μm² Process Monitor and Threshold Voltage Extractor Circuit in 28 nm

A new architecture of an on-die process monitor circuit is demonstrated in 28 nm. The proposed circuit can extract the threshold voltage,

$V_{\mathrm { TH,}}$

and random mismatch of a transistor using multiple extraction methods, including the second derivative method. A sigma-delta modulator analog-to-digital converter samples the output to enable on-die processing of the results. A

$V_{\mathrm { DS}}$

voltage control loop enables

$V_{\mathrm { TH}}$

extraction in both the linear and saturation regions of the device. The circuit has a compact area of

$5510~\mu $

m2.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊