22 纳米 FD-SOI CMOS 中用于联合雷达通信的 D 波段 13 毫瓦双模 CMOS LNA

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Solid-State Circuits Letters Pub Date : 2024-09-09 DOI:10.1109/LSSC.2024.3455889

Shankkar Balasubramanian;Kristof Vaesen;Anirudh Kankuppe;Sehoon Park;Carsten Wulff

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引用次数: 0

摘要

这封信介绍了一种采用 22 纳米 CMOS 技术的 D 波段低噪声放大器 (LNA)，适用于联合雷达通信应用。该 4 级 LNA 利用晶体管开关和偏置等级变化实现双模功能。在雷达模式下，该 LNA 的增益为 17 dB，噪声系数 (NF) 为 7.7 dB，3 dB 带宽 (BW) 为 117-129 GHz，IP1dB 为 -20 dBm。在通信模式下，LNA 的增益为 22.6 dB，NF 为 8.5 dB，BW 为 115.9-128.9 GHz，IP1dB 为 -29 dBm。雷达和通信模式的功耗分别为 13 mW 和 12.2 mW。LNA 的核心面积为 0.06~\text {mm}^{2}$ 。

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A D-Band 13-mW Dual-Mode CMOS LNA for Joint Radar–Communication in 22-nm FD-SOI CMOS

This letter presents a D-band low-noise amplifier (LNA) for joint radar-communication applications in 22-nm CMOS technology. The 4-stage LNA uses transistor switching and bias class changes to achieve dual-mode functionality. In the radar mode, the LNA achieves gain of 17 dB, noise figure (NF) of 7.7 dB, 3-dB bandwidth (BW) of 117–129 GHz, and IP1dB of −20 dBm, respectively. In the communication mode, the LNA achieves gain of 22.6 dB, NF of 8.5 dB, BW of 115.9–128.9 GHz, and IP1dB of −29 dBm, respectively. The power consumption for the radar and communication modes is 13 and 12.2 mW, respectively. The LNA has a core area of

$0.06~\text {mm}^{2}$

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来源期刊

IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering

CiteScore

4.30

自引率

3.70%

发文量