8 Gb/秒远端串音消除和 FFE 协同设计 TX 输出驱动器

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Guan-Yu Chen;Tai-Cheng Lee
{"title":"8 Gb/秒远端串音消除和 FFE 协同设计 TX 输出驱动器","authors":"Guan-Yu Chen;Tai-Cheng Lee","doi":"10.1109/LSSC.2024.3439399","DOIUrl":null,"url":null,"abstract":"This letter describes a single-ended transmitter (TX) output driver, which combines a feed-forward equalizer (FFE) and a far-end crosstalk (FEXT) canceller. The proposed output driver reduces the crosstalk-induced jitter (CIJ) between the two parallel coupled microstrip lines while preserving the inherent high-frequency boosting signal for the channel loss compensation. A prototype operating at a supply voltage of 0.9 V was fabricated in a 28-nm CMOS technology, occupying an area of \n<inline-formula> <tex-math>$0.025~{\\text {mm}^{2}}$ </tex-math></inline-formula>\n. This prototype reduces the peak-to-peak jitter and CIJ by 48% (29 ps) and 114%, respectively, at 8 Gb/s. Furthermore, it increases the horizontal eye-opening (BER < 1E-12) by 34%, with an energy efficiency of 1.08 pJ/bit/channel.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":null,"pages":null},"PeriodicalIF":2.2000,"publicationDate":"2024-08-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An 8 Gb/s Far-End Crosstalk Cancelation and FFE Co-Designed TX Output Driver\",\"authors\":\"Guan-Yu Chen;Tai-Cheng Lee\",\"doi\":\"10.1109/LSSC.2024.3439399\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This letter describes a single-ended transmitter (TX) output driver, which combines a feed-forward equalizer (FFE) and a far-end crosstalk (FEXT) canceller. The proposed output driver reduces the crosstalk-induced jitter (CIJ) between the two parallel coupled microstrip lines while preserving the inherent high-frequency boosting signal for the channel loss compensation. A prototype operating at a supply voltage of 0.9 V was fabricated in a 28-nm CMOS technology, occupying an area of \\n<inline-formula> <tex-math>$0.025~{\\\\text {mm}^{2}}$ </tex-math></inline-formula>\\n. This prototype reduces the peak-to-peak jitter and CIJ by 48% (29 ps) and 114%, respectively, at 8 Gb/s. Furthermore, it increases the horizontal eye-opening (BER < 1E-12) by 34%, with an energy efficiency of 1.08 pJ/bit/channel.\",\"PeriodicalId\":13032,\"journal\":{\"name\":\"IEEE Solid-State Circuits Letters\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2024-08-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Solid-State Circuits Letters\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10623838/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10623838/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0

摘要

本文介绍了一种单端发射器(TX)输出驱动器,它结合了前馈均衡器(FFE)和远端串扰(FEXT)消除器。所提出的输出驱动器降低了两条平行耦合微带线之间的串扰诱导抖动(CIJ),同时保留了用于信道损耗补偿的固有高频升压信号。我们采用 28 纳米 CMOS 技术制作了工作电压为 0.9 V 的原型,占地面积为 0.025~{text {mm}^{2}}$。该原型在 8 Gb/s 速率下将峰峰抖动和 CIJ 分别降低了 48% (29 ps) 和 114%。此外,它还将水平开眼率(误码率 < 1E-12)提高了 34%,能效为 1.08 pJ/比特/信道。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An 8 Gb/s Far-End Crosstalk Cancelation and FFE Co-Designed TX Output Driver
This letter describes a single-ended transmitter (TX) output driver, which combines a feed-forward equalizer (FFE) and a far-end crosstalk (FEXT) canceller. The proposed output driver reduces the crosstalk-induced jitter (CIJ) between the two parallel coupled microstrip lines while preserving the inherent high-frequency boosting signal for the channel loss compensation. A prototype operating at a supply voltage of 0.9 V was fabricated in a 28-nm CMOS technology, occupying an area of $0.025~{\text {mm}^{2}}$ . This prototype reduces the peak-to-peak jitter and CIJ by 48% (29 ps) and 114%, respectively, at 8 Gb/s. Furthermore, it increases the horizontal eye-opening (BER < 1E-12) by 34%, with an energy efficiency of 1.08 pJ/bit/channel.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
IEEE Solid-State Circuits Letters
IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering
CiteScore
4.30
自引率
3.70%
发文量
52
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信