{"title":"一款采用 16 纳米 FinFet 技术的双路 W 波段功率放大器,带有隔离式组合输出网络,可提高功率衰减效率","authors":"Yahia Ibrahim;Ali Niknejad","doi":"10.1109/LSSC.2024.3426336","DOIUrl":null,"url":null,"abstract":"This letter introduces a W-Band sequential power amplifier (PA) (Lehmann and Knoechel, 2008) with a novel output network designed to minimize passive and combiner losses, while reducing the overall footprint compared to conventional sequential and Doherty PAs (Doherty, 1936). An isolated output combiner sums two PAs operating in two different modes: 1) the main amplifier operates in class AB and 2) the auxiliary amplifier operates in class C. The measured PA achieves a saturated output power \n<inline-formula> <tex-math>$(\\mathbf {P_{\\mathrm { sat}}})$ </tex-math></inline-formula>\n of 13 dBm and a gain of 12.5 dB with 3-dB bandwidth (BW) from 79.5 to 94.5 GHz. Additionally, it demonstrates a peak power-added efficiency (PAE) of 19.4% and a 14.6% PAE at 6-dB power back-off (PBO) at 87.5 GHz. Furthermore, the PA achieves a data rate of 12 Gb/s for a 16QAM signal with an average output power of 5 dBm, an average PAE of 10%, and an EVM (RMS) of -20 dB. The PA was fabricated in 16-nm FinFet technology with core area of 0.15 mm2. To the authors’ knowledge, this PA has the highest PAE at 6-dB PBO for CMOS PAs operating in the W-Band.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"7 ","pages":"203-206"},"PeriodicalIF":2.2000,"publicationDate":"2024-07-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 2-Way W-Band Power Amplifier With an Isolated Combining Output Network for Power Back-Off Efficiency Enhancement in 16-nm FinFet Technology\",\"authors\":\"Yahia Ibrahim;Ali Niknejad\",\"doi\":\"10.1109/LSSC.2024.3426336\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This letter introduces a W-Band sequential power amplifier (PA) (Lehmann and Knoechel, 2008) with a novel output network designed to minimize passive and combiner losses, while reducing the overall footprint compared to conventional sequential and Doherty PAs (Doherty, 1936). An isolated output combiner sums two PAs operating in two different modes: 1) the main amplifier operates in class AB and 2) the auxiliary amplifier operates in class C. The measured PA achieves a saturated output power \\n<inline-formula> <tex-math>$(\\\\mathbf {P_{\\\\mathrm { sat}}})$ </tex-math></inline-formula>\\n of 13 dBm and a gain of 12.5 dB with 3-dB bandwidth (BW) from 79.5 to 94.5 GHz. Additionally, it demonstrates a peak power-added efficiency (PAE) of 19.4% and a 14.6% PAE at 6-dB power back-off (PBO) at 87.5 GHz. Furthermore, the PA achieves a data rate of 12 Gb/s for a 16QAM signal with an average output power of 5 dBm, an average PAE of 10%, and an EVM (RMS) of -20 dB. The PA was fabricated in 16-nm FinFet technology with core area of 0.15 mm2. To the authors’ knowledge, this PA has the highest PAE at 6-dB PBO for CMOS PAs operating in the W-Band.\",\"PeriodicalId\":13032,\"journal\":{\"name\":\"IEEE Solid-State Circuits Letters\",\"volume\":\"7 \",\"pages\":\"203-206\"},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2024-07-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Solid-State Circuits Letters\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10592042/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10592042/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
A 2-Way W-Band Power Amplifier With an Isolated Combining Output Network for Power Back-Off Efficiency Enhancement in 16-nm FinFet Technology
This letter introduces a W-Band sequential power amplifier (PA) (Lehmann and Knoechel, 2008) with a novel output network designed to minimize passive and combiner losses, while reducing the overall footprint compared to conventional sequential and Doherty PAs (Doherty, 1936). An isolated output combiner sums two PAs operating in two different modes: 1) the main amplifier operates in class AB and 2) the auxiliary amplifier operates in class C. The measured PA achieves a saturated output power
$(\mathbf {P_{\mathrm { sat}}})$
of 13 dBm and a gain of 12.5 dB with 3-dB bandwidth (BW) from 79.5 to 94.5 GHz. Additionally, it demonstrates a peak power-added efficiency (PAE) of 19.4% and a 14.6% PAE at 6-dB power back-off (PBO) at 87.5 GHz. Furthermore, the PA achieves a data rate of 12 Gb/s for a 16QAM signal with an average output power of 5 dBm, an average PAE of 10%, and an EVM (RMS) of -20 dB. The PA was fabricated in 16-nm FinFet technology with core area of 0.15 mm2. To the authors’ knowledge, this PA has the highest PAE at 6-dB PBO for CMOS PAs operating in the W-Band.