Exploring Non-TAP Interfaces for Efficient and Secure Access to IJTAG Network

The IEEE Std. 1687 (IJTAG) enables efficient access to on-chip instruments through the Test Access Port (TAP) controller of IEEE Std. 1149.1 (JTAG). However, practical constraints such as physical size, manufacturing intricacies, and cost considerations often pose challenges in allocating test IO pins exclusively for TAP usage, especially in resource constraint ICs. To circumvent these limitations, the IEEE Std. P1687.1 explores alternative means of utilizing functional ports, such as Inter-integrated Circuit (I2C), Universal Asynchronous Receiver-Transmitter (UART), and Serial Peripheral Interface (SPI), as non-TAP device interfaces. Recently, a protocol that utilizes UART as a device interface to access on-chip instruments has been proposed. However, this protocol suffers from excessive access time and data overhead and lacks security considerations. To address these issues, this paper presents a low-cost, secure access protocol. The proposed protocol is able to reduce the access time and data overhead by a maximum of 45.51% and 69.66%, respectively, and it incurs a minimal area overhead. Additionally, the protocol integrates robust security measures based on data encryption, thwarting both local and remote intruders from stealing useful information over the IJTAG network.