{"title":"通过研究 LGS 和 LG 的缩放对源接入电阻的影响考察 InAlN/GaN HFET 的直流性能和线性度","authors":"Yatexu Patel;Pouya Valizadeh","doi":"10.1109/JEDS.2024.3428969","DOIUrl":null,"url":null,"abstract":"In this manuscript, we have investigated the impact of the scaling of the gate-source length (LGS) and gate length (LG) on the output characterises and gate-transconductance (Gm) linearity of metallic-face InAlN/AlN/GaN heterostructure field effect transistors (HFETs) having fin structures only under the gate and those having them stretched from source to drain. Evidence for both device types suggests that the downscaling of LGS and LG augments the electron velocity in the source-access region, as a result of which the higher carrier density under the gated-channel improves the maximum drain-current density but not necessarily the \n<inline-formula> <tex-math>$G_{m}$ </tex-math></inline-formula>\n linearity of the device. It is shown that the devices having a planar and longer source access region are exhibiting relatively improved gate-transconductance linearity. This is suggested to be due to their almost constant source access resistance (Rs). In addition, the downscaling of the LG is observed to have a positive influence on device linearity. This observation could be due to the larger exposure to the drain-induced barrier lowering (DIBL) and the resulting rush of the carriers from the source access region to the gated-channel, leading to the suppression of the increasing \n<inline-formula> <tex-math>$R_{s}$ </tex-math></inline-formula>\n at higher drain currents.","PeriodicalId":2,"journal":{"name":"ACS Applied Bio Materials","volume":null,"pages":null},"PeriodicalIF":4.6000,"publicationDate":"2024-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10599155","citationCount":"0","resultStr":"{\"title\":\"Investigation of the DC Performance and Linearity of InAlN/GaN HFETs via Studying the Impact of the Scaling of LGS and LG on the Source Access Resistance\",\"authors\":\"Yatexu Patel;Pouya Valizadeh\",\"doi\":\"10.1109/JEDS.2024.3428969\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this manuscript, we have investigated the impact of the scaling of the gate-source length (LGS) and gate length (LG) on the output characterises and gate-transconductance (Gm) linearity of metallic-face InAlN/AlN/GaN heterostructure field effect transistors (HFETs) having fin structures only under the gate and those having them stretched from source to drain. Evidence for both device types suggests that the downscaling of LGS and LG augments the electron velocity in the source-access region, as a result of which the higher carrier density under the gated-channel improves the maximum drain-current density but not necessarily the \\n<inline-formula> <tex-math>$G_{m}$ </tex-math></inline-formula>\\n linearity of the device. It is shown that the devices having a planar and longer source access region are exhibiting relatively improved gate-transconductance linearity. This is suggested to be due to their almost constant source access resistance (Rs). In addition, the downscaling of the LG is observed to have a positive influence on device linearity. This observation could be due to the larger exposure to the drain-induced barrier lowering (DIBL) and the resulting rush of the carriers from the source access region to the gated-channel, leading to the suppression of the increasing \\n<inline-formula> <tex-math>$R_{s}$ </tex-math></inline-formula>\\n at higher drain currents.\",\"PeriodicalId\":2,\"journal\":{\"name\":\"ACS Applied Bio Materials\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":4.6000,\"publicationDate\":\"2024-07-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10599155\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ACS Applied Bio Materials\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10599155/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"MATERIALS SCIENCE, BIOMATERIALS\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ACS Applied Bio Materials","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10599155/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"MATERIALS SCIENCE, BIOMATERIALS","Score":null,"Total":0}
引用次数: 0
摘要
在本手稿中,我们研究了栅源长度(LGS)和栅极长度(LG)的缩放对仅在栅极下具有鳍状结构的金属面 InAlN/AlN/GaN 异质结构场效应晶体管(HFET)的输出特性和栅极电感(Gm)线性的影响。这两种器件类型的证据表明,LGS 和 LG 的缩减提高了源极接入区的电子速度,因此栅极沟道下更高的载流子密度提高了器件的最大漏极电流密度,但不一定提高了器件的 $G_{m}$ 线性度。研究表明,具有平面和较长源接入区的器件的栅极-电导线性度相对较高。这是因为它们的源接入电阻 (Rs) 几乎恒定。此外,还观察到 LG 的缩小对器件线性度产生了积极影响。这一现象可能是由于更大程度地暴露于漏极致势垒降低(DIBL),以及由此导致的载流子从源极接入区涌向栅极沟道,从而抑制了在更高漏极电流下不断增加的 $R_{s}$。
Investigation of the DC Performance and Linearity of InAlN/GaN HFETs via Studying the Impact of the Scaling of LGS and LG on the Source Access Resistance
In this manuscript, we have investigated the impact of the scaling of the gate-source length (LGS) and gate length (LG) on the output characterises and gate-transconductance (Gm) linearity of metallic-face InAlN/AlN/GaN heterostructure field effect transistors (HFETs) having fin structures only under the gate and those having them stretched from source to drain. Evidence for both device types suggests that the downscaling of LGS and LG augments the electron velocity in the source-access region, as a result of which the higher carrier density under the gated-channel improves the maximum drain-current density but not necessarily the
$G_{m}$
linearity of the device. It is shown that the devices having a planar and longer source access region are exhibiting relatively improved gate-transconductance linearity. This is suggested to be due to their almost constant source access resistance (Rs). In addition, the downscaling of the LG is observed to have a positive influence on device linearity. This observation could be due to the larger exposure to the drain-induced barrier lowering (DIBL) and the resulting rush of the carriers from the source access region to the gated-channel, leading to the suppression of the increasing
$R_{s}$
at higher drain currents.