增强型 P 基植入碳化硅 VDMOSFET 的特性和雪崩研究

IF 1.6 4区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Reliability Pub Date : 2024-07-18 DOI:10.1016/j.microrel.2024.115451

Houcai Luo , Jingping Zhang , Huan Wu , Bofeng Zheng , Xiao Wang , Kai Zheng , Guo-Qi Zhang , Xianping Chen

{"title":"增强型 P 基植入碳化硅 VDMOSFET 的特性和雪崩研究","authors":"Houcai Luo , Jingping Zhang , Huan Wu , Bofeng Zheng , Xiao Wang , Kai Zheng , Guo-Qi Zhang , Xianping Chen","doi":"10.1016/j.microrel.2024.115451","DOIUrl":null,"url":null,"abstract":"<div><p>Two P-Based depth of SiC VDMOSFETs (group A and B) are designed and manufactured by enhanced P-Based implantation. The group A with lower P-based depth has a better static properties, while group B has a higher high frequency switching performance. Further, the avalanche reliability and failure mechanism for two groups are investigated by UIS experiment and TCAD simulation. The results show that the high temperature is generated by energy dissipation during avalanche and it drives the parasitic BJT conduction, causing I<sub>ds</sub> out of control and instantaneous heat concentration in a very short time. Significantly, high P-Based depth exhibits higher UIS reliability due to smaller R<sub>b</sub> and more difficult to active parasitic BJT.</p></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"160 ","pages":"Article 115451"},"PeriodicalIF":1.6000,"publicationDate":"2024-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Characteristics and avalanche investigation of SiC VDMOSFETs with enhanced P-Based implantation\",\"authors\":\"Houcai Luo , Jingping Zhang , Huan Wu , Bofeng Zheng , Xiao Wang , Kai Zheng , Guo-Qi Zhang , Xianping Chen\",\"doi\":\"10.1016/j.microrel.2024.115451\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>Two P-Based depth of SiC VDMOSFETs (group A and B) are designed and manufactured by enhanced P-Based implantation. The group A with lower P-based depth has a better static properties, while group B has a higher high frequency switching performance. Further, the avalanche reliability and failure mechanism for two groups are investigated by UIS experiment and TCAD simulation. The results show that the high temperature is generated by energy dissipation during avalanche and it drives the parasitic BJT conduction, causing I<sub>ds</sub> out of control and instantaneous heat concentration in a very short time. Significantly, high P-Based depth exhibits higher UIS reliability due to smaller R<sub>b</sub> and more difficult to active parasitic BJT.</p></div>\",\"PeriodicalId\":51131,\"journal\":{\"name\":\"Microelectronics Reliability\",\"volume\":\"160 \",\"pages\":\"Article 115451\"},\"PeriodicalIF\":1.6000,\"publicationDate\":\"2024-07-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microelectronics Reliability\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S0026271424001318\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Reliability","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0026271424001318","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}

引用次数: 0

摘要

通过增强型 P 基植入法设计和制造了两种 P 基深度的 SiC VDMOSFET（A 组和 B 组）。P 基深度较低的 A 组具有更好的静态性能，而 B 组则具有更高的高频开关性能。此外，还通过 UIS 实验和 TCAD 仿真研究了两组器件的雪崩可靠性和失效机制。结果表明，雪崩时的能量耗散会产生高温，并推动寄生 BJT 导通，导致 Ids 失控，并在极短的时间内瞬时发热。由于 Rb 较小，寄生 BJT 更难活跃，因此高 P 基底面深度的 UIS 可靠性更高。

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Characteristics and avalanche investigation of SiC VDMOSFETs with enhanced P-Based implantation

Two P-Based depth of SiC VDMOSFETs (group A and B) are designed and manufactured by enhanced P-Based implantation. The group A with lower P-based depth has a better static properties, while group B has a higher high frequency switching performance. Further, the avalanche reliability and failure mechanism for two groups are investigated by UIS experiment and TCAD simulation. The results show that the high temperature is generated by energy dissipation during avalanche and it drives the parasitic BJT conduction, causing I_ds out of control and instantaneous heat concentration in a very short time. Significantly, high P-Based depth exhibits higher UIS reliability due to smaller R_b and more difficult to active parasitic BJT.

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来源期刊

Microelectronics Reliability 工程技术-工程：电子与电气

CiteScore

3.30

自引率

12.50%

发文量

342

审稿时长

68 days

期刊介绍： Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged. Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.