基于 AND 阵列运行的铁电场效应晶体管 (FeFET) 偏置方案演示

IF 1.4 4区物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Solid-state Electronics Pub Date : 2024-03-30 DOI:10.1016/j.sse.2024.108917

Shinhee Kim , Jae Yeon Park , Dong Keun Lee , Hyungju Noh , Tae-Hyeon Kim , Sihyun Kim , Sangwan Kim

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引用次数: 0

摘要

在本研究中，我们通过实验为基于铁电场效应晶体管（FeFET）的 AND 阵列演示了一种简化的写入抑制偏置方案，这是一种很有前途的节能、省面积存储器。通过对单芯片铁电场效应晶体管的测量，优化了只采用位线（BL）电压的写入抑制方案。经证实，位线/源线（SL）电压分别为 3.5 V/0 V 时，写入和擦除操作明显受到抑制。建议的抑制偏置方案随后被应用于 16 × 16 FeFET AND 阵列，以证明其有效性。结果清楚地证明，在不调节 SL 电压的情况下，可以进行选择性编程/擦除操作，这表明该方案在面积效率方面具有优势。

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Demonstration of bias scheme for ferroelectric field-effect transistor (FeFET) based AND array operation

In this study, we experimentally demonstrated a simplified write inhibition bias scheme for a ferroelectric field-effect transistor (FeFET) based AND array, which is the promising energy- and area-efficient memory. The write inhibition scheme that only employs the bit line (BL) voltages was optimized through the single cell FeFET measurements. The program and erase operations were confirmed to be apparently inhibited with the BL/source line (SL) voltages of 3.5 V/0 V, respectively. The suggested inhibition bias scheme was then applied to the 16 × 16 FeFET AND array for demonstrating its validity. It was clearly verified that selective program/erase operations were possible without modulating the SL voltages, suggesting its benefits in terms of area-efficiency.

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来源期刊

Solid-state Electronics 物理-工程：电子与电气

CiteScore

3.00

自引率

5.90%

发文量

212

审稿时长

3 months

期刊介绍： It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.