Paul Stampfer;Frederic Roger;Lukas Cvitkovich;Tibor Grasser;Michael Waltl
{"title":"关于硅光电二极管中深沟槽加工诱导陷阱状态的 DLTS 研究","authors":"Paul Stampfer;Frederic Roger;Lukas Cvitkovich;Tibor Grasser;Michael Waltl","doi":"10.1109/TDMR.2024.3382396","DOIUrl":null,"url":null,"abstract":"We present a Deep Level Transient Spectroscopy (DLTS) study on dedicated test samples to investigate the defect landscape of deep trench (DT) sidewalls. The DT is commonly used to prevent crosstalk between two neighboring optoelectronic devices or as a separator between different functional blocks on a monolithic semiconductor chip. However, in minority carrier-based optoelectronic devices, such as photodiodes, carriers might recombine at trap states located at the DT to silicon interface causing performance degradation. The extracted parameters of the DLTS study are further utilized to investigate this recombination in terms of TCAD simulations. The results suggest that carrier recombination at the DT sidewalls of DT-terminated photodiodes may lead to non-linear responsivities with respect to the optical radiant flux. Furthermore, on the example of silicon dangling bonds, we investigate the influence of structural relaxations at the defect sites which are incorporated in the nonradiative multiphonon (NMP) model. By a comparison between the NMP model to the conventional Shockley-Read-Hall (SRH) model we show, that a difference in the emission barrier of approx. 50 meV will arise, resulting in a strong shift of the corresponding DLTS transients.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"24 2","pages":"161-167"},"PeriodicalIF":2.5000,"publicationDate":"2024-03-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10480619","citationCount":"0","resultStr":"{\"title\":\"A DLTS Study on Deep Trench Processing-Induced Trap States in Silicon Photodiodes\",\"authors\":\"Paul Stampfer;Frederic Roger;Lukas Cvitkovich;Tibor Grasser;Michael Waltl\",\"doi\":\"10.1109/TDMR.2024.3382396\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present a Deep Level Transient Spectroscopy (DLTS) study on dedicated test samples to investigate the defect landscape of deep trench (DT) sidewalls. The DT is commonly used to prevent crosstalk between two neighboring optoelectronic devices or as a separator between different functional blocks on a monolithic semiconductor chip. However, in minority carrier-based optoelectronic devices, such as photodiodes, carriers might recombine at trap states located at the DT to silicon interface causing performance degradation. The extracted parameters of the DLTS study are further utilized to investigate this recombination in terms of TCAD simulations. The results suggest that carrier recombination at the DT sidewalls of DT-terminated photodiodes may lead to non-linear responsivities with respect to the optical radiant flux. Furthermore, on the example of silicon dangling bonds, we investigate the influence of structural relaxations at the defect sites which are incorporated in the nonradiative multiphonon (NMP) model. By a comparison between the NMP model to the conventional Shockley-Read-Hall (SRH) model we show, that a difference in the emission barrier of approx. 50 meV will arise, resulting in a strong shift of the corresponding DLTS transients.\",\"PeriodicalId\":448,\"journal\":{\"name\":\"IEEE Transactions on Device and Materials Reliability\",\"volume\":\"24 2\",\"pages\":\"161-167\"},\"PeriodicalIF\":2.5000,\"publicationDate\":\"2024-03-27\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10480619\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Device and Materials Reliability\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10480619/\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Device and Materials Reliability","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10480619/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
A DLTS Study on Deep Trench Processing-Induced Trap States in Silicon Photodiodes
We present a Deep Level Transient Spectroscopy (DLTS) study on dedicated test samples to investigate the defect landscape of deep trench (DT) sidewalls. The DT is commonly used to prevent crosstalk between two neighboring optoelectronic devices or as a separator between different functional blocks on a monolithic semiconductor chip. However, in minority carrier-based optoelectronic devices, such as photodiodes, carriers might recombine at trap states located at the DT to silicon interface causing performance degradation. The extracted parameters of the DLTS study are further utilized to investigate this recombination in terms of TCAD simulations. The results suggest that carrier recombination at the DT sidewalls of DT-terminated photodiodes may lead to non-linear responsivities with respect to the optical radiant flux. Furthermore, on the example of silicon dangling bonds, we investigate the influence of structural relaxations at the defect sites which are incorporated in the nonradiative multiphonon (NMP) model. By a comparison between the NMP model to the conventional Shockley-Read-Hall (SRH) model we show, that a difference in the emission barrier of approx. 50 meV will arise, resulting in a strong shift of the corresponding DLTS transients.
期刊介绍:
The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.