Reliability and Optimization Simulation Study of Zero-Temperature-Delay Point in Digital Circuits for Advanced Technology

Thermal challenges are increasingly significant for advanced technology, and the operating environment with large temperature variation also acts as one of the crucial threats to the system’s performance and reliability. To improve the temperature immunity of digital circuits, in this work, the supply voltage (VDD) making the delay immune to temperature variation is identified, which differs from the zero-temperature-coefficient (ZTC) point used in analog applications and is defined as the zero-temperature-delay (ZTD) point. The dependencies and optimal selection of ZTD point in digital circuits are studied by simulation. The influence factors including standard cell types and circuit operations have been investigated accordingly. Moreover, the exploration of ZTD point with different delay metrics is discussed, which is the basis of the selection of ZTD point at standard cell level. The ZTD point changes due to the five PVT corners and the selection of the ZTD point under these PVT corners are studied. Taking three kinds of delay chains and benchmark circuits as an example, the ZTD point in the critical path of the circuit is further investigated. The simulation results confirm that utilizing the ZTD voltage during the design of digital circuits can provide a better temperature-resistant solution, which makes sense for temperature immunity digital applications.