{"title":"用于带隔离电容器 D 波段宽带功率分配器的小型化阶跃阻抗传输线","authors":"Seonjeong Park;Songcheol Hong","doi":"10.1109/LSSC.2024.3359315","DOIUrl":null,"url":null,"abstract":"In this letter, a broadband Wilkinson power divider (WPD) with small size and low loss using round-shaped stepped impedance transmission lines (RS-SITLs) is proposed in both differential and single-ended structures. Miniaturization was achieved through the SITLs with an electrical length smaller than 90°. The insufficient length for odd-mode matching is addressed by introducing an isolation capacitor. Physical parameters are determined considering feasible characteristic impedances through respective mode analyses. Chips are fabricated using a 40-nm RF CMOS process, resulting in a 25% reduction in area compared to the conventional WPD with a \n<inline-formula> <tex-math>$\\boldsymbol{\\lambda }$ </tex-math></inline-formula>\n/4 transmission line, with a core size as small as \n<inline-formula> <tex-math>$0.002~\\lambda ^{2}$ </tex-math></inline-formula>\n. In the 110–170-GHz band, the proposed single-ended and differential SITL WPDs, respectively, have low-insertion losses (ILs) of 0.91 and 0.69 dB and high isolations (ISOs) of 14.7 and 15.3 dB.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"7 ","pages":"78-81"},"PeriodicalIF":2.2000,"publicationDate":"2024-01-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Miniaturized Stepped Impedance Transmission Lines for D-Band Wideband Power Divider With Isolation Capacitor\",\"authors\":\"Seonjeong Park;Songcheol Hong\",\"doi\":\"10.1109/LSSC.2024.3359315\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this letter, a broadband Wilkinson power divider (WPD) with small size and low loss using round-shaped stepped impedance transmission lines (RS-SITLs) is proposed in both differential and single-ended structures. Miniaturization was achieved through the SITLs with an electrical length smaller than 90°. The insufficient length for odd-mode matching is addressed by introducing an isolation capacitor. Physical parameters are determined considering feasible characteristic impedances through respective mode analyses. Chips are fabricated using a 40-nm RF CMOS process, resulting in a 25% reduction in area compared to the conventional WPD with a \\n<inline-formula> <tex-math>$\\\\boldsymbol{\\\\lambda }$ </tex-math></inline-formula>\\n/4 transmission line, with a core size as small as \\n<inline-formula> <tex-math>$0.002~\\\\lambda ^{2}$ </tex-math></inline-formula>\\n. In the 110–170-GHz band, the proposed single-ended and differential SITL WPDs, respectively, have low-insertion losses (ILs) of 0.91 and 0.69 dB and high isolations (ISOs) of 14.7 and 15.3 dB.\",\"PeriodicalId\":13032,\"journal\":{\"name\":\"IEEE Solid-State Circuits Letters\",\"volume\":\"7 \",\"pages\":\"78-81\"},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2024-01-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Solid-State Circuits Letters\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10415880/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10415880/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
Miniaturized Stepped Impedance Transmission Lines for D-Band Wideband Power Divider With Isolation Capacitor
In this letter, a broadband Wilkinson power divider (WPD) with small size and low loss using round-shaped stepped impedance transmission lines (RS-SITLs) is proposed in both differential and single-ended structures. Miniaturization was achieved through the SITLs with an electrical length smaller than 90°. The insufficient length for odd-mode matching is addressed by introducing an isolation capacitor. Physical parameters are determined considering feasible characteristic impedances through respective mode analyses. Chips are fabricated using a 40-nm RF CMOS process, resulting in a 25% reduction in area compared to the conventional WPD with a
$\boldsymbol{\lambda }$
/4 transmission line, with a core size as small as
$0.002~\lambda ^{2}$
. In the 110–170-GHz band, the proposed single-ended and differential SITL WPDs, respectively, have low-insertion losses (ILs) of 0.91 and 0.69 dB and high isolations (ISOs) of 14.7 and 15.3 dB.