用于窄带接收机的带 11 位电荷域 DAC 的低功耗、高可重构模拟 FIR 滤波器

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Solid-State Circuits Letters Pub Date : 2024-02-01 DOI:10.1109/LSSC.2024.3361380

Chien-Wei Tseng;Zhen Feng;Zichen Fan;Hyochan An;Yunfan Wang;Hun-Seok Kim;David Blaauw

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引用次数: 0

摘要

本文介绍了一种用于高信道选择性接收机的创新型、高度可重构的电荷域模拟有限脉冲响应（AFIR）滤波器。该滤波器具有出色的可重构性，可适应不同的带宽和所需的阻带抑制，并通过控制跨导的导通时间的时变脉冲宽度实现电荷域系数。电荷域有限脉冲响应（FIR）原理是在这封信中逐步推导出来的。所提出的滤波器采用 28 纳米 CMOS 工艺制造，占地面积仅为 0.05 mm 2，带宽可在 0.37 至 4.6 MHz 之间重新配置。该滤波器可以实现-70-dB的阻带抑制，过渡尖锐（$-f_{-60 {\mathrm {dB}}^{/f}-3~ {\mathrm {dB}}\,\,=$ 4.5），功耗低至0.356 mW。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A Low-Power Highly Reconfigurable Analog FIR Filter With 11-Bit Charge-Domain DAC for Narrowband Receivers

An innovative, highly reconfigurable charge-domain analog finite-impulse-response (AFIR) filter for high-channel selectivity receivers is presented. This filter demonstrates excellent reconfigurability to different bandwidths and desired stopband rejection and realizes the coefficients in the charge-domain with time-varying pulse widths controlling the on-time of the transconductor. The charge-domain finite impulse response (FIR) principle is derived step by step in this letter. The proposed filter, manufactured in 28-nm CMOS process, occupies a compact area of 0.05 mm 2, and its bandwidth can be reconfigured from 0.37 to 4.6 MHz. The filter can achieve −70-dB stopband rejection with a sharp transition (

$-f_{-60 {\mathrm {dB}}}^{/f}-3~ {\mathrm {dB}}\,\,=$

4.5) and low-power consumption of 0.356 mW.

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来源期刊

IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering

CiteScore

4.30

自引率

3.70%

发文量