基于电磁耦合 D 类 LC 振荡器和谐振 LC 飞行阻抗的 1.5 GHz 全集成 DC-DC 转换器,可实现 4.1-W/mm2 峰值功率密度和 77% 峰值效率

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Alessandro Novello;Gabriele Atzeni;Tim Keller;Taekwang Jang
{"title":"基于电磁耦合 D 类 LC 振荡器和谐振 LC 飞行阻抗的 1.5 GHz 全集成 DC-DC 转换器,可实现 4.1-W/mm2 峰值功率密度和 77% 峰值效率","authors":"Alessandro Novello;Gabriele Atzeni;Tim Keller;Taekwang Jang","doi":"10.1109/LSSC.2023.3341049","DOIUrl":null,"url":null,"abstract":"This letter introduces a fully integrated DC–DC converter based on electromagnetically coupled class-D LC oscillators (EMLC) manufactured in a 22nm FDSOI CMOS process. The proposed converter implements a resonant LC flying impedance that improves the EMLC output resistance by accomplishing a resonant charge transfer between the flying capacitor CFLY and the load capacitor CO. This design achieves 77% peak efficiency and 4.1 W/mm2 peak power density in a total area of 0.33 mm2. The output voltage is regulated with a duty cycling scheme from 0.003 W/mm2 up to 2.1 W/mm2 with < 2% efficiency loss.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"7 ","pages":"38-41"},"PeriodicalIF":2.2000,"publicationDate":"2023-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 1.5-GHz Fully Integrated DC–DC Converter Based on Electromagnetically Coupled Class-D LC Oscillators and Resonant LC Flying Impedance Achieving 4.1-W/mm2 Peak Power Density and 77% Peak Efficiency\",\"authors\":\"Alessandro Novello;Gabriele Atzeni;Tim Keller;Taekwang Jang\",\"doi\":\"10.1109/LSSC.2023.3341049\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This letter introduces a fully integrated DC–DC converter based on electromagnetically coupled class-D LC oscillators (EMLC) manufactured in a 22nm FDSOI CMOS process. The proposed converter implements a resonant LC flying impedance that improves the EMLC output resistance by accomplishing a resonant charge transfer between the flying capacitor CFLY and the load capacitor CO. This design achieves 77% peak efficiency and 4.1 W/mm2 peak power density in a total area of 0.33 mm2. The output voltage is regulated with a duty cycling scheme from 0.003 W/mm2 up to 2.1 W/mm2 with < 2% efficiency loss.\",\"PeriodicalId\":13032,\"journal\":{\"name\":\"IEEE Solid-State Circuits Letters\",\"volume\":\"7 \",\"pages\":\"38-41\"},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2023-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Solid-State Circuits Letters\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10349350/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10349350/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0

摘要

本文介绍了一种基于电磁耦合 D 类 LC 振荡器 (EMLC) 的全集成 DC-DC 转换器,该器件采用 22 纳米 FDSOI CMOS 工艺制造。该转换器采用谐振 LC 飞行阻抗,通过在飞行电容器 CFLY 和负载电容器 CO 之间实现谐振电荷转移来提高 EMLC 输出电阻。该设计的峰值效率为 77%,峰值功率密度为 4.1 W/mm2,总面积为 0.33 mm2。输出电压通过占空比循环方案调节,从 0.003 W/mm2 到 2.1 W/mm2,效率损失小于 2%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 1.5-GHz Fully Integrated DC–DC Converter Based on Electromagnetically Coupled Class-D LC Oscillators and Resonant LC Flying Impedance Achieving 4.1-W/mm2 Peak Power Density and 77% Peak Efficiency
This letter introduces a fully integrated DC–DC converter based on electromagnetically coupled class-D LC oscillators (EMLC) manufactured in a 22nm FDSOI CMOS process. The proposed converter implements a resonant LC flying impedance that improves the EMLC output resistance by accomplishing a resonant charge transfer between the flying capacitor CFLY and the load capacitor CO. This design achieves 77% peak efficiency and 4.1 W/mm2 peak power density in a total area of 0.33 mm2. The output voltage is regulated with a duty cycling scheme from 0.003 W/mm2 up to 2.1 W/mm2 with < 2% efficiency loss.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
IEEE Solid-State Circuits Letters
IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering
CiteScore
4.30
自引率
3.70%
发文量
52
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信