{"title":"可变性、边际和不可预测性:处理SRAM设计中的不确定性","authors":"R. Aitken","doi":"10.1109/MTDT.2007.4547605","DOIUrl":null,"url":null,"abstract":"As process technology continues to advance, SRAM design is becoming increasingly critical. Not only does memory occupy a large portion of the design, but memory structures are increasingly susceptible to yield and variability issues than. Classical design validation and margining methods must be extended to cope with new challenges, including low power operation, accurate modeling, blurring lines between defects and variability, and limits of classical scaling. This talk addresses these issues and discusses new approaches they require.","PeriodicalId":422226,"journal":{"name":"2007 IEEE International Workshop on Memory Technology, Design and Testing","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-12-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Variability, margins, and unpredictability: Dealing with uncertainty in SRAM design\",\"authors\":\"R. Aitken\",\"doi\":\"10.1109/MTDT.2007.4547605\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As process technology continues to advance, SRAM design is becoming increasingly critical. Not only does memory occupy a large portion of the design, but memory structures are increasingly susceptible to yield and variability issues than. Classical design validation and margining methods must be extended to cope with new challenges, including low power operation, accurate modeling, blurring lines between defects and variability, and limits of classical scaling. This talk addresses these issues and discusses new approaches they require.\",\"PeriodicalId\":422226,\"journal\":{\"name\":\"2007 IEEE International Workshop on Memory Technology, Design and Testing\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-12-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE International Workshop on Memory Technology, Design and Testing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MTDT.2007.4547605\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE International Workshop on Memory Technology, Design and Testing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MTDT.2007.4547605","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Variability, margins, and unpredictability: Dealing with uncertainty in SRAM design
As process technology continues to advance, SRAM design is becoming increasingly critical. Not only does memory occupy a large portion of the design, but memory structures are increasingly susceptible to yield and variability issues than. Classical design validation and margining methods must be extended to cope with new challenges, including low power operation, accurate modeling, blurring lines between defects and variability, and limits of classical scaling. This talk addresses these issues and discusses new approaches they require.