{"title":"简写的3D堆栈(存储芯片封装)","authors":"J. Minahan, A. Pepe, R. Some, M. Suer","doi":"10.1109/ECTC.1992.204230","DOIUrl":null,"url":null,"abstract":"A novel form of 3D high-density stack, called a short stack, has been built and tested. One version of the short stack allowed accurate measurement of the T-connect resistance, approximately=0.025 ohms, while a second version was designed to provide four memory chips stacked for use in a low headroom application that incorporated the 3D technology with the high-density interconnect multichip approach.<<ETX>>","PeriodicalId":125270,"journal":{"name":"1992 Proceedings 42nd Electronic Components & Technology Conference","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-05-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"The 3D stack in short form (memory chip packaging)\",\"authors\":\"J. Minahan, A. Pepe, R. Some, M. Suer\",\"doi\":\"10.1109/ECTC.1992.204230\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel form of 3D high-density stack, called a short stack, has been built and tested. One version of the short stack allowed accurate measurement of the T-connect resistance, approximately=0.025 ohms, while a second version was designed to provide four memory chips stacked for use in a low headroom application that incorporated the 3D technology with the high-density interconnect multichip approach.<<ETX>>\",\"PeriodicalId\":125270,\"journal\":{\"name\":\"1992 Proceedings 42nd Electronic Components & Technology Conference\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-05-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1992 Proceedings 42nd Electronic Components & Technology Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.1992.204230\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1992 Proceedings 42nd Electronic Components & Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.1992.204230","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The 3D stack in short form (memory chip packaging)
A novel form of 3D high-density stack, called a short stack, has been built and tested. One version of the short stack allowed accurate measurement of the T-connect resistance, approximately=0.025 ohms, while a second version was designed to provide four memory chips stacked for use in a low headroom application that incorporated the 3D technology with the high-density interconnect multichip approach.<>
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