{"title":"InGaAs纳米线mosfet, IOFF = 100 nA/µm, VDD = 0.5 V, ION = 555µA/µm","authors":"C. Zota, Fredrik Lindelow, L. Wernersson, E. Lind","doi":"10.1109/VLSIT.2016.7573418","DOIUrl":null,"url":null,"abstract":"We report on In<sub>0.85</sub>Ga<sub>0.15</sub>As nanowire MOSFETs (NWFETs) with record performance in several key VLSI metrics. These devices exhibit I<sub>ON</sub> = 555 μA/μm (at I<sub>OFF</sub> = 100 nA/μm and V<sub>DD</sub> = 0.5 V), I<sub>ON</sub> = 365 μA/μm (at I<sub>OFF</sub> = 10 nA/μm and V<sub>DD</sub> = 0.5 V) and a quality factor Q = g<sub>m</sub>/SS of 40, all of which are the highest reported for a III-V as well as silicon transistor. Furthermore, a highly scalable, self-aligned gate-last fabrication process is utilized, with a single nanowire as the channel. The devices use a 45° angle between the nanowire and the contacts, which allows for up to a 1.4 times longer gate length at a given pitch.","PeriodicalId":129300,"journal":{"name":"2016 IEEE Symposium on VLSI Technology","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"InGaAs nanowire MOSFETs with ION = 555 µA/µm at IOFF = 100 nA/µm and VDD = 0.5 V\",\"authors\":\"C. Zota, Fredrik Lindelow, L. Wernersson, E. Lind\",\"doi\":\"10.1109/VLSIT.2016.7573418\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We report on In<sub>0.85</sub>Ga<sub>0.15</sub>As nanowire MOSFETs (NWFETs) with record performance in several key VLSI metrics. These devices exhibit I<sub>ON</sub> = 555 μA/μm (at I<sub>OFF</sub> = 100 nA/μm and V<sub>DD</sub> = 0.5 V), I<sub>ON</sub> = 365 μA/μm (at I<sub>OFF</sub> = 10 nA/μm and V<sub>DD</sub> = 0.5 V) and a quality factor Q = g<sub>m</sub>/SS of 40, all of which are the highest reported for a III-V as well as silicon transistor. Furthermore, a highly scalable, self-aligned gate-last fabrication process is utilized, with a single nanowire as the channel. The devices use a 45° angle between the nanowire and the contacts, which allows for up to a 1.4 times longer gate length at a given pitch.\",\"PeriodicalId\":129300,\"journal\":{\"name\":\"2016 IEEE Symposium on VLSI Technology\",\"volume\":\"2 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Symposium on VLSI Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2016.7573418\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2016.7573418","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
InGaAs nanowire MOSFETs with ION = 555 µA/µm at IOFF = 100 nA/µm and VDD = 0.5 V
We report on In0.85Ga0.15As nanowire MOSFETs (NWFETs) with record performance in several key VLSI metrics. These devices exhibit ION = 555 μA/μm (at IOFF = 100 nA/μm and VDD = 0.5 V), ION = 365 μA/μm (at IOFF = 10 nA/μm and VDD = 0.5 V) and a quality factor Q = gm/SS of 40, all of which are the highest reported for a III-V as well as silicon transistor. Furthermore, a highly scalable, self-aligned gate-last fabrication process is utilized, with a single nanowire as the channel. The devices use a 45° angle between the nanowire and the contacts, which allows for up to a 1.4 times longer gate length at a given pitch.
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