Impact of local stress in 3D stacking process on memory retention characteristics in thinned DRAM chip

The effect of local stresses on memory retention characteristics has been characterized in detail. A retention time of memory cells in a DRAM chip with 200-μm thick was largely changed after under-fill shrinkage with Cu/Sn bumps. Meanwhile, after thinned down to 40-μm thick, the retention time of memory cell was not significantly changed in the whole area even with Cu/Sn bumps due to decreased stress. We showed that the local stress generated by under-fill shrinkage with the dummy Cu/Sn bumps gave larger effects on the memory retention characteristics than the stress generated by the Si thinning until 40-μm thick.