一种新的逻辑电路在高度可观测条件下的可测试设计

Proceedings of IEEE 3rd Asian Test Symposium (ATS) Pub Date : 1994-11-15 DOI:10.1109/ATS.1994.367231

W. Xiaoqing, H. Tamamoto, K. Kinoshita

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引用次数: 0

摘要

本文提出了k-FR电路的概念。结果表明，通过k(k+1)+1试验可以检测和定位k- fr电路中的所有卡断故障和卡开故障，从而达到高度可观察的条件。K通常是2或3。本文还提出了一种将任意组合电路转换为k-FR电路的算法

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A new testable design of logic circuits under highly observable condition

This paper presents the concept of k-FR circuits. It is shown that all stuck-at faults and stuck-open faults in a k-FR circuit can be detected and located by k(k+1)+1 tests render the highly observable condition. K is usually two or three. The paper also presents an algorithm for converting an arbitrary combinational circuit into a k-FR circuit.<>

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Proceedings of IEEE 3rd Asian Test Symposium (ATS)

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