{"title":"灵活,高性能的引脚电子实现","authors":"P. King","doi":"10.1109/TEST.1989.82367","DOIUrl":null,"url":null,"abstract":"The author discusses an implementation of the pin electronics for a distributed architecture (resource-per-pin) printed circuit board test system. Included are descriptions of the custom integrated circuits and hybrids used to accomplish this at a reasonable cost. The pin electronics card which incorporates these custom parts is a relatively sparse looking 16-in by 20.5-in assembly. It is densely routed on six layers using conservative design rules (25-mil line pitch) to achieve the required interconnect. These custom parts allow the automatic compensation for many of the error terms found in a high-performance board test system. The present work demonstrates that it is possible to add significantly to the functionality of printed circuit board test systems through the use of custom integrated circuits. This added functionality can be used to provide new test capabilities and to make existing capabilities easier to use, thereby helping the user meet demanding test requirements. Along with the functionality improvements come equally important accuracy, reliability, and cost benefits.<<ETX>>","PeriodicalId":264111,"journal":{"name":"Proceedings. 'Meeting the Tests of Time'., International Test Conference","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-08-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Flexible, high-performance pin electronics implementation\",\"authors\":\"P. King\",\"doi\":\"10.1109/TEST.1989.82367\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The author discusses an implementation of the pin electronics for a distributed architecture (resource-per-pin) printed circuit board test system. Included are descriptions of the custom integrated circuits and hybrids used to accomplish this at a reasonable cost. The pin electronics card which incorporates these custom parts is a relatively sparse looking 16-in by 20.5-in assembly. It is densely routed on six layers using conservative design rules (25-mil line pitch) to achieve the required interconnect. These custom parts allow the automatic compensation for many of the error terms found in a high-performance board test system. The present work demonstrates that it is possible to add significantly to the functionality of printed circuit board test systems through the use of custom integrated circuits. This added functionality can be used to provide new test capabilities and to make existing capabilities easier to use, thereby helping the user meet demanding test requirements. Along with the functionality improvements come equally important accuracy, reliability, and cost benefits.<<ETX>>\",\"PeriodicalId\":264111,\"journal\":{\"name\":\"Proceedings. 'Meeting the Tests of Time'., International Test Conference\",\"volume\":\"55 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-08-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. 'Meeting the Tests of Time'., International Test Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TEST.1989.82367\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. 'Meeting the Tests of Time'., International Test Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TEST.1989.82367","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The author discusses an implementation of the pin electronics for a distributed architecture (resource-per-pin) printed circuit board test system. Included are descriptions of the custom integrated circuits and hybrids used to accomplish this at a reasonable cost. The pin electronics card which incorporates these custom parts is a relatively sparse looking 16-in by 20.5-in assembly. It is densely routed on six layers using conservative design rules (25-mil line pitch) to achieve the required interconnect. These custom parts allow the automatic compensation for many of the error terms found in a high-performance board test system. The present work demonstrates that it is possible to add significantly to the functionality of printed circuit board test systems through the use of custom integrated circuits. This added functionality can be used to provide new test capabilities and to make existing capabilities easier to use, thereby helping the user meet demanding test requirements. Along with the functionality improvements come equally important accuracy, reliability, and cost benefits.<>