这是关于力量:架构师对互联的看法

B. Dally
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引用次数: 3

摘要

只提供摘要形式。随着集成电路技术的规模化,芯片的功耗越来越大,而不是受到面积的限制,芯片上、关断和跨芯片移动比特的功耗也变得越来越重要。这个演讲给出了一个架构师对未来芯片互连的看法。互连的需求是由应用驱动的。soc和高性能处理器都有苛刻的互连要求。在现代芯片中,通过将全球互连组织为片上网络或NoC来满足这些要求。这种组织提供的规律性使布局和电路优化成为可能。为了降低每比特毫米的能量,采用复杂电路的低能量信号正得到越来越广泛的应用。重要的是要优化整个互连系统-导线,电路和NoC一起-而不仅仅是孤立的三个。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
It's about the power: An architect's view of interconnect
Summary form only given. As integrated circuit technology scales chips are becoming power, not area limited, and the power dissipated moving bits on, off, and across chips is becoming increasingly important. This talk gives an architect's perspective on future chip interconnect. The demand for interconnect is driven by the application. Both SoCs and high-performance processors have demanding interconnect requirements. In modern chips, these requirements are met by organizing global interconnect as a network-on-chip or NoC. The regularity afforded by this organization enables layout and circuit optimizations. To reduce the energy per bit-mm, low-energy signaling with sophisticated circuits are becoming more widely used. It is important to optimize the entire interconnect system - the wire, the circuit, and the NoC together - not just each of the three in isolation.
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