{"title":"内置故障诊断的分层测试生成","authors":"D. Stroobandt, J. V. Campenhout","doi":"10.1109/ATS.1996.555130","DOIUrl":null,"url":null,"abstract":"A hierarchical test generation method is presented that uses the inherent hierarchical structure of the circuit under test and takes fault diagnosability into account right from the start. An efficient test compaction method leads to a very compact test set, while retaining a maximum of diagnostic power and a 100% fault coverage for non-fanout circuits. An extension for fanout circuits is also presented.","PeriodicalId":215252,"journal":{"name":"Proceedings of the Fifth Asian Test Symposium (ATS'96)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-11-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Hierarchical test generation with built-in fault diagnosis\",\"authors\":\"D. Stroobandt, J. V. Campenhout\",\"doi\":\"10.1109/ATS.1996.555130\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A hierarchical test generation method is presented that uses the inherent hierarchical structure of the circuit under test and takes fault diagnosability into account right from the start. An efficient test compaction method leads to a very compact test set, while retaining a maximum of diagnostic power and a 100% fault coverage for non-fanout circuits. An extension for fanout circuits is also presented.\",\"PeriodicalId\":215252,\"journal\":{\"name\":\"Proceedings of the Fifth Asian Test Symposium (ATS'96)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-11-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the Fifth Asian Test Symposium (ATS'96)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.1996.555130\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the Fifth Asian Test Symposium (ATS'96)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.1996.555130","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hierarchical test generation with built-in fault diagnosis
A hierarchical test generation method is presented that uses the inherent hierarchical structure of the circuit under test and takes fault diagnosability into account right from the start. An efficient test compaction method leads to a very compact test set, while retaining a maximum of diagnostic power and a 100% fault coverage for non-fanout circuits. An extension for fanout circuits is also presented.