基于片上SPRAM(自旋传递扭矩RAM)的3d堆叠可重构自旋逻辑芯片的超快并行重构

T. Tanaka, H. Kino, R. Nakazawa, K. Kiyoyama, H. Ohno, M. Koyanagi
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引用次数: 15

摘要

我们开发了一种具有超快片上SPRAM的新型3d堆叠可重构自旋逻辑芯片,以克服传统可重构lsi的缺点。精心设计了两个可重构自旋逻辑芯片,并利用三维集成技术成功堆叠。通过对SPRAM单元的评估,该电路的最快写入速度为5 ns。为了实现更高性能的可重构逻辑电路,首次全面论证了堆叠可重构自旋逻辑芯片的并行重构。超快片上SPRAM和3d堆叠结构将开启可重构lsi的新时代。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Ultrafast parallel reconfiguration of 3D-stacked reconfigurable spin logic chip with on-chip SPRAM (SPin-transfer torque RAM)
We have developed novel 3D-stacked reconfigurable spin logic chip having ultrafast on-chip SPRAM to overcome drawbacks of conventional reconfigurable LSIs. Two reconfigurable spin logic chips were carefully designed and successfully stacked using 3D integration technology. From the SPRAM cell evaluation, the fastest write speed of 5 ns was obtained in the circuits. To realize higher performance reconfigurable LSIs, parallel reconfiguration was fully demonstrated for the stacked reconfigurable spin logic chips for the first time. Both ultrafast on-chip SPRAM and 3D-stacked structure will open a new era of reconfigurable LSIs.
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