{"title":"将热压缩模型集成到印刷布线组件的有限元模拟中","authors":"D. Haller, K. Neumaier, S.H. Khan, K. Grattan","doi":"10.1109/STHERM.2004.1291334","DOIUrl":null,"url":null,"abstract":"In this paper a strategy for the integration of boundary condition independent (BCI) thermal compact models in board-level static thermal finite element (FE) analyses of printed wiring assemblies (PWA) is presented. This concept is an integral part of a software development project for automatic investigation of solder joint fatigue of surface mount devices (SMT). The overall automation process comprises data capture for PWA, layout data repair and session control for finite element analysis (FEA). Solder joint fatigue results from then-no-mechanical stresses. For this reason both board- and component-level thermal simulations are needed. Among other component descriptions BCI thermal compact models can be automatically incorporated into FE models replacing detail FE modeling of IC packages. This approach has been investigated in various test examples. A further application of this approach to transient simulations seems to be possible.","PeriodicalId":409730,"journal":{"name":"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-03-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Integration of thermal compact models into finite element simulation of printed wiring assemblies\",\"authors\":\"D. Haller, K. Neumaier, S.H. Khan, K. Grattan\",\"doi\":\"10.1109/STHERM.2004.1291334\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper a strategy for the integration of boundary condition independent (BCI) thermal compact models in board-level static thermal finite element (FE) analyses of printed wiring assemblies (PWA) is presented. This concept is an integral part of a software development project for automatic investigation of solder joint fatigue of surface mount devices (SMT). The overall automation process comprises data capture for PWA, layout data repair and session control for finite element analysis (FEA). Solder joint fatigue results from then-no-mechanical stresses. For this reason both board- and component-level thermal simulations are needed. Among other component descriptions BCI thermal compact models can be automatically incorporated into FE models replacing detail FE modeling of IC packages. This approach has been investigated in various test examples. A further application of this approach to transient simulations seems to be possible.\",\"PeriodicalId\":409730,\"journal\":{\"name\":\"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)\",\"volume\":\"17 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-03-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/STHERM.2004.1291334\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Twentieth Annual IEEE Semiconductor Thermal Measurement and Management Symposium (IEEE Cat. No.04CH37545)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/STHERM.2004.1291334","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Integration of thermal compact models into finite element simulation of printed wiring assemblies
In this paper a strategy for the integration of boundary condition independent (BCI) thermal compact models in board-level static thermal finite element (FE) analyses of printed wiring assemblies (PWA) is presented. This concept is an integral part of a software development project for automatic investigation of solder joint fatigue of surface mount devices (SMT). The overall automation process comprises data capture for PWA, layout data repair and session control for finite element analysis (FEA). Solder joint fatigue results from then-no-mechanical stresses. For this reason both board- and component-level thermal simulations are needed. Among other component descriptions BCI thermal compact models can be automatically incorporated into FE models replacing detail FE modeling of IC packages. This approach has been investigated in various test examples. A further application of this approach to transient simulations seems to be possible.