{"title":"通过超声增强的模板印刷来碰撞晶圆片","authors":"F. Andres, C. Lee, G. Pham-Van-diep","doi":"10.1109/IEMT.2003.1225923","DOIUrl":null,"url":null,"abstract":"Traditional solder paste stencil printing is widely used and a well understood process in surface mount board assembly. But when applied to solder bumping wafers, stencil printing faces several challenges such as meeting bump height, co-planarity and voiding requirements. There are physical limitations within stencil printing that limits solder paste deposits at extremely tight pitches. Recent work has demonstrated that stencil printing can produce greater and more reliable material transfers at tighter pitches when high frequency vibrations are applied to the stencil at the time of stencil/substrate separation. This paper examines the feasibility of using conventional stencil printing coupled with an innovative ultrasonically enhanced procedure to offer a cost effective, flexible technique for solder wafer bumping. The effects of applying a high frequency vibration to a variety of stencil designs will be examined for wafer bumping applications. Paste development, reflow and process optimization will be discussed. Work will focus on bumping wafers with 250 /spl mu/m pitch and 100 /spl mu/m bump height. Bump height distribution, co-planarity performance and die yield per wafer are examined to determine the viability of the technique.","PeriodicalId":106415,"journal":{"name":"IEEE/CPMT/SEMI 28th International Electronics Manufacturing Technology Symposium, 2003. IEMT 2003.","volume":"107 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Bumping wafers via ultrasonically enhanced stencil printing\",\"authors\":\"F. Andres, C. Lee, G. Pham-Van-diep\",\"doi\":\"10.1109/IEMT.2003.1225923\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Traditional solder paste stencil printing is widely used and a well understood process in surface mount board assembly. But when applied to solder bumping wafers, stencil printing faces several challenges such as meeting bump height, co-planarity and voiding requirements. There are physical limitations within stencil printing that limits solder paste deposits at extremely tight pitches. Recent work has demonstrated that stencil printing can produce greater and more reliable material transfers at tighter pitches when high frequency vibrations are applied to the stencil at the time of stencil/substrate separation. This paper examines the feasibility of using conventional stencil printing coupled with an innovative ultrasonically enhanced procedure to offer a cost effective, flexible technique for solder wafer bumping. The effects of applying a high frequency vibration to a variety of stencil designs will be examined for wafer bumping applications. Paste development, reflow and process optimization will be discussed. Work will focus on bumping wafers with 250 /spl mu/m pitch and 100 /spl mu/m bump height. Bump height distribution, co-planarity performance and die yield per wafer are examined to determine the viability of the technique.\",\"PeriodicalId\":106415,\"journal\":{\"name\":\"IEEE/CPMT/SEMI 28th International Electronics Manufacturing Technology Symposium, 2003. IEMT 2003.\",\"volume\":\"107 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-07-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE/CPMT/SEMI 28th International Electronics Manufacturing Technology Symposium, 2003. IEMT 2003.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEMT.2003.1225923\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE/CPMT/SEMI 28th International Electronics Manufacturing Technology Symposium, 2003. IEMT 2003.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEMT.2003.1225923","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Bumping wafers via ultrasonically enhanced stencil printing
Traditional solder paste stencil printing is widely used and a well understood process in surface mount board assembly. But when applied to solder bumping wafers, stencil printing faces several challenges such as meeting bump height, co-planarity and voiding requirements. There are physical limitations within stencil printing that limits solder paste deposits at extremely tight pitches. Recent work has demonstrated that stencil printing can produce greater and more reliable material transfers at tighter pitches when high frequency vibrations are applied to the stencil at the time of stencil/substrate separation. This paper examines the feasibility of using conventional stencil printing coupled with an innovative ultrasonically enhanced procedure to offer a cost effective, flexible technique for solder wafer bumping. The effects of applying a high frequency vibration to a variety of stencil designs will be examined for wafer bumping applications. Paste development, reflow and process optimization will be discussed. Work will focus on bumping wafers with 250 /spl mu/m pitch and 100 /spl mu/m bump height. Bump height distribution, co-planarity performance and die yield per wafer are examined to determine the viability of the technique.