全功能0.5-/spl mu/m 64 kbit嵌入式SBT FeRAM采用新的低温SBT沉积技术

1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325) Pub Date : 1999-06-14 DOI:10.1109/VLSIT.1999.799382

T. Eshita, K. Nakamura, M. Mushiga, A. Itho, S. Miyagaki, H. Yamawaki, M. Aoki, S. Kishii, Y. Arimoto

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引用次数: 5

摘要

采用一种新的低温SBT沉积技术制备了嵌入64 kbit SBT (SrBi/sub 2/(Ta,Nb)/sub 2/O/sub 9/)的0.5 /spl mu/m设计规则的铁电RAM。该沉积技术成功地将SBT结晶温度从800/spl°C降至700/spl°C，实现了FeRAM和精细CMOS逻辑器件的W插头共制。所制造的装置已被证明功能齐全。

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Fully functional 0.5-/spl mu/m 64-kbit embedded SBT FeRAM using a new low temperature SBT deposition technique

0.5 /spl mu/m design rule embedded 64 kbit SBT (SrBi/sub 2/(Ta,Nb)/sub 2/O/sub 9/) FeRAMs (ferroelectric RAM) are fabricated using a new low temperature SBT deposition technique. The developed deposition technique has successfully lowered SBT crystallization temperature from 800/spl deg/C to 700/spl deg/C, resulting in co-fabrication of FeRAM and fine CMOS logic devices with W plugs. The fabricated devices are proven to be fully functional.

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来源期刊

1999 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.99CH36325)

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