级掺杂缓冲层对VDMOSFET SEE失效的影响

2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2016-07-18 DOI:10.1109/IPFA.2016.7564299

Yunpeng Jia, Ling Peng, Hongyuan Su, D. Hu, Yuehua Wu

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引用次数: 5

摘要

单事件烧穿(SEB)是VDMOSFET中常见的单事件效应(SEE)，以往的研究表明，器件的二次击穿电压与SEB阈值电压之间存在很强的关系。本文提出了一种级掺杂缓冲层结构，以提高器件的二次击穿电压，从而提高对SEE的电阻。通过详细的仿真，验证了优化后的级掺杂缓冲层可以降低电场峰值，显著提高寄生双极导通电流和SEB阈值电压。此外，与无缓冲层和恒定掺杂缓冲层结构相比，优化后的级掺杂缓冲层结构在SEE硬化VDMOSFET中是一种更有效的结构。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Effect of grade doping buffer layer on SEE failure in VDMOSFET

Single event burnout (SEB) is a common single event effect (SEE) occur in VDMOSFET, previous studies have indicated the strong relationship between the device's secondary breakdown voltage and the SEB threshold voltage. This paper presents a grade doping buffer layer structure to improve the device's secondary breakdown voltage so that enhance the resistance to SEE. Through detailed simulation, it has been verified that optimized grade doping buffer layer can decrease the peak value of the electric field, significantly improve the parasitic bipolar turn-on current and the SEB threshold voltage. Moreover, compared to non-buffer layer and constant doping buffer layer structure, the optimized grade doping buffer structure is a more effective structure in SEE hardened VDMOSFET.

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2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)

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