背照电压域全局快门CMOS图像传感器，具有3.75µm像素和双像素内存储节点

2016 IEEE Symposium on VLSI Technology Pub Date : 2016-06-14 DOI:10.1109/VLSIT.2016.7573451

L. Stark, J. Raynor, F. Lalanne, R. Henderson

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引用次数: 12

摘要

采用90nm/65nm背照(BSI)成像工艺，实现了具有电压域全局快门像素和双像素存储的1024×800图像传感器。该像素的间距为3.75μm，在相关双采样模式下可实现-80dB PLS，在高动态范围成像模式下最大动态范围为102dB。

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Back-illuminated voltage-domain global shutter CMOS image sensor with 3.75µm pixels and dual in-pixel storage nodes

A 1024×800 image sensor with voltage-domain global shutter pixels and dual in-pixel storage is implemented in a 90nm/65nm back-illuminated (BSI) imaging process. The pixel has a 3.75μm pitch, achieves -80dB PLS operating in its correlated double sampling mode and has a maximum dynamic range in its high-dynamic range imaging mode of 102dB.

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2016 IEEE Symposium on VLSI Technology

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