65nm CMOS Cu/Low-k BEOL互连技术可靠性鉴定

F. Chen, B. Li, T. Lee, C. Christiansen, J. Gill, M. Angyal, M. Shinosky, C. Burke, W. Hasting, R. Austin, T. Sullivan, D. Badami, J. Aitken
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引用次数: 7

摘要

在300mm低k/Cu后端线(BEOL)技术的开发和鉴定过程中,这种互连的长期可靠性,包括低k时间相关介电击穿(TDDB)、Cu电迁移(EM)、Cu应力迁移(SM)和Cu/低k热行为,正迅速成为最关键的挑战之一。本文报道了65nm Cu/低k互连的综合可靠性评估,并讨论了在初始开发阶段与工艺集成和材料优化相关的各种可靠性问题。最后,我们证明了通过精心的工艺和材料优化,可以在300mm制造中实现65nm技术节点上优越的互连可靠性性能。TDDB、EM和SM的预计可靠性寿命满足最严格的可靠性目标和标准
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Technology Reliability Qualification of a 65nm CMOS Cu/Low-k BEOL Interconnect
During the development and qualification of a 300mm low-k/Cu back end of line (BEOL) technology, the long-term reliability of such interconnects including low-k time-dependent dielectric breakdown (TDDB), Cu electromigration (EM), Cu stress migration (SM), and Cu/low-k thermal behavior are rapidly becoming one of the most critical challenges. In this paper, a comprehensive reliability evaluation for 65nm Cu/low-k interconnects is reported and various reliability issues associated with process integration and material optimization during initial development stage are discussed. Finally, we demonstrate that with careful process and materials optimization, a superior interconnect reliability performance at the 65nm technology node can be achieved for 300mm fabrication. The projected reliability lifetimes of TDDB, EM, and SM meet the most stringent reliability targets and criteria
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