J. An, K. Moon, Soyoung Lee, Do-Sun Lee, Kiyoung Yun, Byung-lyul Park, Hojoon Lee, Jiwoong Sue, Yeong L. Park, Gilheyun Choi, Ho-Kyu Kang, C. Chung
{"title":"控制Cu TSV挤压型缺陷的退火工艺和结构考虑","authors":"J. An, K. Moon, Soyoung Lee, Do-Sun Lee, Kiyoung Yun, Byung-lyul Park, Hojoon Lee, Jiwoong Sue, Yeong L. Park, Gilheyun Choi, Ho-Kyu Kang, C. Chung","doi":"10.1109/IITC.2012.6251586","DOIUrl":null,"url":null,"abstract":"Stresses induced by the large volume of Cu in Through Silicon Vias (TSV) can result in global/local Cu extrusion which may affect reliability in 3D chip stacking technologies beyond the 28 nm node for high performance mobile devices. In this work, TSV structural factors that can influence extrusion post via filling are studied. In addition, the impact of the electroplating chemistry and annealing schemes on local extrusion type defect formation in TSVs are also studied.","PeriodicalId":165741,"journal":{"name":"2012 IEEE International Interconnect Technology Conference","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Annealing process and structural considerations in controlling extrusion-type defects Cu TSV\",\"authors\":\"J. An, K. Moon, Soyoung Lee, Do-Sun Lee, Kiyoung Yun, Byung-lyul Park, Hojoon Lee, Jiwoong Sue, Yeong L. Park, Gilheyun Choi, Ho-Kyu Kang, C. Chung\",\"doi\":\"10.1109/IITC.2012.6251586\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Stresses induced by the large volume of Cu in Through Silicon Vias (TSV) can result in global/local Cu extrusion which may affect reliability in 3D chip stacking technologies beyond the 28 nm node for high performance mobile devices. In this work, TSV structural factors that can influence extrusion post via filling are studied. In addition, the impact of the electroplating chemistry and annealing schemes on local extrusion type defect formation in TSVs are also studied.\",\"PeriodicalId\":165741,\"journal\":{\"name\":\"2012 IEEE International Interconnect Technology Conference\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-06-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE International Interconnect Technology Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IITC.2012.6251586\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International Interconnect Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IITC.2012.6251586","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Annealing process and structural considerations in controlling extrusion-type defects Cu TSV
Stresses induced by the large volume of Cu in Through Silicon Vias (TSV) can result in global/local Cu extrusion which may affect reliability in 3D chip stacking technologies beyond the 28 nm node for high performance mobile devices. In this work, TSV structural factors that can influence extrusion post via filling are studied. In addition, the impact of the electroplating chemistry and annealing schemes on local extrusion type defect formation in TSVs are also studied.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
