原子晶体管芯片的制备与工艺表征

Ho-Chiao Chuang, Evan A. Salim, V. Vuletić, Dana Z. Anderson, Victor M. Bright
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摘要

本文介绍了一种用于原子隧穿实验的原子芯片的设计与制作。开发了一种制造工艺,该工艺使用uv光学和电子束光刻相结合,在单个芯片上对微米和纳米尺度的铜线进行图案设计。在这项工作中制造的最小线宽为200nm。导线的电流密度可以超过7.5×107 A/cm2。电流实验证明了在芯片上实现原子隧穿实验的可行性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Fabrication and process characterization of atom transistor chips
This paper describes the design and fabrication of an atom chip for atom tunneling experiments. A fabrication process was developed that uses a combination of UV-optical and Electron-Beam lithography to pattern micrometer and nanometer scale copper wires on a single chip. The minimum wire width fabricated in this work is 200nm. The wires can carry current densities of more than 7.5×107 A/cm2. The electrical current tests establish the feasibility of realizing chip-based atom tunneling experiments.
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