基于噪声的PCMOS误差更精确的模型

2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications Pub Date : 2010-01-13 DOI:10.1109/DELTA.2010.18

A. Bhanu, Mark S. K. Lau, K. Ling, V. Mooney, Anshul Singh

{"title":"基于噪声的PCMOS误差更精确的模型","authors":"A. Bhanu, Mark S. K. Lau, K. Ling, V. Mooney, Anshul Singh","doi":"10.1109/DELTA.2010.18","DOIUrl":null,"url":null,"abstract":"In this paper we present a new model for characterization of probabilistic gates. While still not mainstream, probabilistic CMOS has the potential to dramatically reduce energy consumption by trading off with error rates on individual bits, e.g., least significant bits of an adder. Our contribution helps account for the filtering effect seen in noise based PCMOS in a novel way. The characterization proposed here can enable accurate multi-bit models based on fast mathematical extrapolation instead of expensive and slow HSPICE simulations.","PeriodicalId":421336,"journal":{"name":"2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications","volume":"132 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-01-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"18","resultStr":"{\"title\":\"A More Precise Model of Noise Based PCMOS Errors\",\"authors\":\"A. Bhanu, Mark S. K. Lau, K. Ling, V. Mooney, Anshul Singh\",\"doi\":\"10.1109/DELTA.2010.18\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we present a new model for characterization of probabilistic gates. While still not mainstream, probabilistic CMOS has the potential to dramatically reduce energy consumption by trading off with error rates on individual bits, e.g., least significant bits of an adder. Our contribution helps account for the filtering effect seen in noise based PCMOS in a novel way. The characterization proposed here can enable accurate multi-bit models based on fast mathematical extrapolation instead of expensive and slow HSPICE simulations.\",\"PeriodicalId\":421336,\"journal\":{\"name\":\"2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications\",\"volume\":\"132 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2010-01-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"18\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DELTA.2010.18\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DELTA.2010.18","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 18

摘要

本文提出了一种描述概率门的新模型。虽然概率CMOS仍不是主流，但它有潜力通过降低单个比特(例如加法器的最低有效位)的错误率来显著降低能耗。我们的贡献有助于以一种新颖的方式解释基于噪声的PCMOS中的滤波效应。本文提出的表征可以实现基于快速数学外推的精确多比特模型，而不是昂贵且缓慢的HSPICE模拟。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A More Precise Model of Noise Based PCMOS Errors

In this paper we present a new model for characterization of probabilistic gates. While still not mainstream, probabilistic CMOS has the potential to dramatically reduce energy consumption by trading off with error rates on individual bits, e.g., least significant bits of an adder. Our contribution helps account for the filtering effect seen in noise based PCMOS in a novel way. The characterization proposed here can enable accurate multi-bit models based on fast mathematical extrapolation instead of expensive and slow HSPICE simulations.

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来源期刊

2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications

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