F. Hsueh, Y. Peng, Chung-Hui Chen, T. Yeh, H. Hsieh, Chin-Ho Chang, Szu-Lin Liu, Mei-Chen Chuang, Mark Chen
{"title":"模拟/射频仙境:先进FinFET技术中的电路和技术协同优化","authors":"F. Hsueh, Y. Peng, Chung-Hui Chen, T. Yeh, H. Hsieh, Chin-Ho Chang, Szu-Lin Liu, Mei-Chen Chuang, Mark Chen","doi":"10.1109/VLSIT.2016.7573399","DOIUrl":null,"url":null,"abstract":"Stacked-gate is one of the most popular solutions used in mismatch-sensitive circuits in FinFET technology. A Bandgap circuit using stacked-gate formed by 150 short-channel devices to achieve high accuracy is demonstrated. Adding uniform surrounding patterns to the target MOS array, the device mismatch caused by DGE (density gradient effect) can be cancelled. In low-power RF LNA and VCO, dc power reductions are achieved. The near-threshold-voltage (NTV) design technique is adopted for further 50% RF power reduction.","PeriodicalId":129300,"journal":{"name":"2016 IEEE Symposium on VLSI Technology","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Analog/RF wonderland: Circuit and technology co-optimization in advanced FinFET technology\",\"authors\":\"F. Hsueh, Y. Peng, Chung-Hui Chen, T. Yeh, H. Hsieh, Chin-Ho Chang, Szu-Lin Liu, Mei-Chen Chuang, Mark Chen\",\"doi\":\"10.1109/VLSIT.2016.7573399\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Stacked-gate is one of the most popular solutions used in mismatch-sensitive circuits in FinFET technology. A Bandgap circuit using stacked-gate formed by 150 short-channel devices to achieve high accuracy is demonstrated. Adding uniform surrounding patterns to the target MOS array, the device mismatch caused by DGE (density gradient effect) can be cancelled. In low-power RF LNA and VCO, dc power reductions are achieved. The near-threshold-voltage (NTV) design technique is adopted for further 50% RF power reduction.\",\"PeriodicalId\":129300,\"journal\":{\"name\":\"2016 IEEE Symposium on VLSI Technology\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-06-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE Symposium on VLSI Technology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2016.7573399\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Symposium on VLSI Technology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2016.7573399","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Analog/RF wonderland: Circuit and technology co-optimization in advanced FinFET technology
Stacked-gate is one of the most popular solutions used in mismatch-sensitive circuits in FinFET technology. A Bandgap circuit using stacked-gate formed by 150 short-channel devices to achieve high accuracy is demonstrated. Adding uniform surrounding patterns to the target MOS array, the device mismatch caused by DGE (density gradient effect) can be cancelled. In low-power RF LNA and VCO, dc power reductions are achieved. The near-threshold-voltage (NTV) design technique is adopted for further 50% RF power reduction.
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