厚多晶硅膜沉积工艺的发展

Tang Kum Cheong, Aloysius Tan Kai Yeow, Cheam Daw Don
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引用次数: 1

摘要

在硅片衬底上沉积厚(> 2 μm)的多晶硅薄膜会导致高发生率(超过一半的硅片被加工)的晶圆破裂,其后果是由破碎的硅片产生的杂散颗粒峰值引起的沉积反应器的不良污染。即使处理过的晶圆片保持完整,它们也可能变得脆弱,因此不适合进一步处理和加工。本文介绍了外延低压化学气相沉积3 μm多晶硅薄膜的工艺发展,实现了在不到十分之一的晶片破碎的情况下沉积3 μm多晶硅薄膜。我们发现了一种两步法-沉积2 μm,然后覆盖1 μm的多晶硅膜-有助于减少晶圆破裂的发生,同时确保薄膜的电性均匀性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Process development for thick polysilicon film deposition
The deposition of thick (> 2 μm) polycrystalline silicon films on silicon wafer substrates can result in high incidences — more than half of wafers processed — of wafer breakage, the consequence of which is undesirable contamination of the deposition reactor arising from a spike in stray particles originating from the broken wafers. Even if the processed wafers remain intact, they may turn fragile and thus, unsuitable for further handling and processing. This paper describes the process development for the deposition of 3 μm polysilicon films, achieved with less than one-tenth of wafers broken, through epitaxial low pressure chemical vapor deposition. We found a two-step approach — deposit 2 μm followed by an overlying 1 μm polysilicon film — instrumental in reducing the occurrence of wafer breakage while ensuring the electrical homogeneity of the film.
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