电子封装的小型化创新演变——接下来会发生什么?

2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT) Pub Date : 2010-11-01 DOI:10.1109/IEMT.2010.5746749

A. Wagiman

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引用次数: 1

摘要

英特尔的摩尔定律侧重于缩小硅中的晶体管，以便在给定的面积内容纳越来越多的晶体管。总的来说，英特尔每隔18-24个月就能将晶体管数量增加一倍，而且在此过程中，硅的尺寸保持不变，甚至更小。这一趋势的关键含义是，需要通过封装路由的I/O密度也在增加。每个区域更多的I/O计数)。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Miniaturization innovation evolution of electronics packaging - What's coming next …?

Intel's Moore's Law focuses on shrinking the transistors in the silicon to be able to pack more and more transistors for a given area. In general, Intel has been able to double the transistor count every 18–24 months and has been doing so while keeping the silicon size at about the same size or even smaller. The key implication to that trend has been the I/O density that needs to be routed through the packaging is also increasing (ie. More I/O count per area).

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2010 34th IEEE/CPMT International Electronic Manufacturing Technology Symposium (IEMT)

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