{"title":"逻辑电路中单比特和多比特错误的并发检测方案","authors":"B. Kolla, P. Lala, K. Yarlagadda","doi":"10.1109/VTEST.1992.232742","DOIUrl":null,"url":null,"abstract":"A new scheme for detecting single and multibit (unidirectional and bidirectional) errors using residue codes has been proposed. This procedure has been applied to circuits with outputs up to 8 bits. It has been shown that about 99% of all multibit errors can be detected using this scheme.<<ETX>>","PeriodicalId":434977,"journal":{"name":"Digest of Papers. 1992 IEEE VLSI Test Symposium","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-04-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A concurrent checking scheme for single and multibit errors in logic circuits\",\"authors\":\"B. Kolla, P. Lala, K. Yarlagadda\",\"doi\":\"10.1109/VTEST.1992.232742\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new scheme for detecting single and multibit (unidirectional and bidirectional) errors using residue codes has been proposed. This procedure has been applied to circuits with outputs up to 8 bits. It has been shown that about 99% of all multibit errors can be detected using this scheme.<<ETX>>\",\"PeriodicalId\":434977,\"journal\":{\"name\":\"Digest of Papers. 1992 IEEE VLSI Test Symposium\",\"volume\":\"49 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-04-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Digest of Papers. 1992 IEEE VLSI Test Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTEST.1992.232742\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Papers. 1992 IEEE VLSI Test Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTEST.1992.232742","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A concurrent checking scheme for single and multibit errors in logic circuits
A new scheme for detecting single and multibit (unidirectional and bidirectional) errors using residue codes has been proposed. This procedure has been applied to circuits with outputs up to 8 bits. It has been shown that about 99% of all multibit errors can be detected using this scheme.<>