扫描路径电路扩展故障类的快速故障仿真

2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications Pub Date : 2010-01-13 DOI:10.1109/DELTA.2010.32

R. Ubar, S. Devadze, J. Raik, A. Jutman

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引用次数: 8

摘要

本文提出了一种适用于扩展故障类的快速故障仿真方法。该方法基于两阶段程序。在第一阶段，采用一种新颖的并行精确关键路径故障跟踪来确定所有具有可检测的卡滞故障的“活动”节点。在该过程的第二阶段，进行推理，以确定可检测的物理缺陷基于“活动”节点的信息和网络的当前(或以前)逻辑状态。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Fast Fault Simulation for Extended Class of Faults in Scan Path Circuits

In this paper, a new very fast fault simulation method for extended class of faults is proposed. The method is based on a two-phase procedure. In the first phase, a novel parallel exact critical path fault tracing is used to determine all the "active" nodes with detectable stuck-at faults. In the second phase of the procedure, reasoning is carried out to determine the detectable physical defects based on the information about the "active" nodes and the current (or previous) logic state of the network.

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来源期刊

2010 Fifth IEEE International Symposium on Electronic Design, Test & Applications

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