Toshizumi Yoshino, Toshimasa Nagoshi, S. Nomoto, A. Nakamura, Nobuhito Komuro, Hayato Sawamoto, Yuta Daijima, Yoshikazu Suzuki
{"title":"顶层薄层和内层绝缘PID材料的研制","authors":"Toshizumi Yoshino, Toshimasa Nagoshi, S. Nomoto, A. Nakamura, Nobuhito Komuro, Hayato Sawamoto, Yuta Daijima, Yoshikazu Suzuki","doi":"10.1109/EPTC.2018.8654403","DOIUrl":null,"url":null,"abstract":"As the functionality of electronic devices is becoming higher, semiconductors with multiple pins and thinner packages are dramatically proceeding. For the photo sensitive insulation is tied to be used for those devices, high reliability such as crack resistance and Highly Accelerated temperature and humidity Stress Test (HAST) resistance is required.","PeriodicalId":360239,"journal":{"name":"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Development of PID material for top thin layer and inner layer insulation\",\"authors\":\"Toshizumi Yoshino, Toshimasa Nagoshi, S. Nomoto, A. Nakamura, Nobuhito Komuro, Hayato Sawamoto, Yuta Daijima, Yoshikazu Suzuki\",\"doi\":\"10.1109/EPTC.2018.8654403\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As the functionality of electronic devices is becoming higher, semiconductors with multiple pins and thinner packages are dramatically proceeding. For the photo sensitive insulation is tied to be used for those devices, high reliability such as crack resistance and Highly Accelerated temperature and humidity Stress Test (HAST) resistance is required.\",\"PeriodicalId\":360239,\"journal\":{\"name\":\"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)\",\"volume\":\"7 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPTC.2018.8654403\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC.2018.8654403","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Development of PID material for top thin layer and inner layer insulation
As the functionality of electronic devices is becoming higher, semiconductors with multiple pins and thinner packages are dramatically proceeding. For the photo sensitive insulation is tied to be used for those devices, high reliability such as crack resistance and Highly Accelerated temperature and humidity Stress Test (HAST) resistance is required.