Modeling techniques for substrate coupling for system-on-a-chip

The demand for integrating systems on a chip functioning at high frequencies, while utilizing the recent advances of submicron IC technologies, has cost IC designers the severe problem of on-chip-crosstalk, particularly substrate coupling. This paper presents three methods for efficient modeling of substrate coupling. We develop a boundary-element method based on Green's theorem for modeling using a rapid Green's function. In addition, closed-form formulas for fast extraction of substrate parasitics in low-dense chips (disperse devices) are derived. We apply the modeling method to analysis of substrate coupling in a large RF-IC.