新颖的倒装芯片球栅阵列设计和挑战,使更高的布线密度和功率要求

C. W. Wong, Chee Kheong Yoon, Seng-Hooi Ong
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引用次数: 1

摘要

倒装芯片球栅阵列(FCBGA)已成为实现更高输入/输出(IO)计数的常用封装技术。对更多功能的需求增加了输入/输出(I/O)接口密度,并需要更好的功率传输解决方案,这意味着更大的外形尺寸和更昂贵的去耦解决方案。增加封装和模具尺寸不是一个选择,因为它会增加封装成本。本文重点介绍了其创新之处,并提供了三种设计方案来满足更高的IO和功耗需求。本文对这三种解决方案进行了详细的讨论。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The novel flip chip ball grid array design and challenges to enable higher routing density and power requirement
Flip chip ball grid array (FCBGA) has been a common package technology to achieve higher input/output (IO) count. The call for more features have increase the input/output (I/O) interface density and require a better power delivery solution which translate into bigger form factor and more expensive decoupling solution. Increasing the package and die size is not an option as it increases the package cost. This paper focuses on the innovation and three design solutions provided to meet the demand for higher IO and power requirement. All the three solutions are discussed in details in this paper.
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