{"title":"新颖的倒装芯片球栅阵列设计和挑战,使更高的布线密度和功率要求","authors":"C. W. Wong, Chee Kheong Yoon, Seng-Hooi Ong","doi":"10.1109/EMAP.2005.1598266","DOIUrl":null,"url":null,"abstract":"Flip chip ball grid array (FCBGA) has been a common package technology to achieve higher input/output (IO) count. The call for more features have increase the input/output (I/O) interface density and require a better power delivery solution which translate into bigger form factor and more expensive decoupling solution. Increasing the package and die size is not an option as it increases the package cost. This paper focuses on the innovation and three design solutions provided to meet the demand for higher IO and power requirement. All the three solutions are discussed in details in this paper.","PeriodicalId":352550,"journal":{"name":"2005 International Symposium on Electronics Materials and Packaging","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"The novel flip chip ball grid array design and challenges to enable higher routing density and power requirement\",\"authors\":\"C. W. Wong, Chee Kheong Yoon, Seng-Hooi Ong\",\"doi\":\"10.1109/EMAP.2005.1598266\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Flip chip ball grid array (FCBGA) has been a common package technology to achieve higher input/output (IO) count. The call for more features have increase the input/output (I/O) interface density and require a better power delivery solution which translate into bigger form factor and more expensive decoupling solution. Increasing the package and die size is not an option as it increases the package cost. This paper focuses on the innovation and three design solutions provided to meet the demand for higher IO and power requirement. All the three solutions are discussed in details in this paper.\",\"PeriodicalId\":352550,\"journal\":{\"name\":\"2005 International Symposium on Electronics Materials and Packaging\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-12-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 International Symposium on Electronics Materials and Packaging\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EMAP.2005.1598266\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 International Symposium on Electronics Materials and Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EMAP.2005.1598266","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The novel flip chip ball grid array design and challenges to enable higher routing density and power requirement
Flip chip ball grid array (FCBGA) has been a common package technology to achieve higher input/output (IO) count. The call for more features have increase the input/output (I/O) interface density and require a better power delivery solution which translate into bigger form factor and more expensive decoupling solution. Increasing the package and die size is not an option as it increases the package cost. This paper focuses on the innovation and three design solutions provided to meet the demand for higher IO and power requirement. All the three solutions are discussed in details in this paper.