工艺尺度对减少泄漏方案效果的影响

2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866) Pub Date : 2004-10-04 DOI:10.1109/ICICDT.2004.1309890

Y. Tsai, David Duartep, N. Vijaykrishnan, M. J. Irwin

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引用次数: 2

摘要

在0.25/spl mu/m、0.18/spl mu/m、0.07/spl mu/m和0.065/spl mu/m技术中，通过确定它们在潜在泄漏减少、性能损失以及面积和功率开销方面的限制和优势，评估了技术尺度对三种运行时泄漏减少技术(输入矢量控制、体偏置控制和电源门控)的影响。给出了各种功能单元和存储结构的HSPICE仿真结果和估计，以支持全面的分析。

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Impact of process scaling on the efficacy of leakage reduction schemes

The effects of technology scaling on three run-time leakage reduction techniques (Input Vector Control, Body Bias Control and Power Supply Gating) are evaluated by determining their limits and benefits, in terms of the potential leakage reduction, performance penalty and area and power overhead in 0.25/spl mu/m, 0.18/spl mu/m, 0.07/spl mu/m and 0.065/spl mu/m technologies. HSPICE simulation results and estimations with various function units and memory structures are presented to support a comprehensive analysis.

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来源期刊

2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)

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