Computationally Efficient Ferroelectric Capacitor Model For Circuit Simulation

A new computationally efficient and accurate model for ferroelectric capacitors is presented. This model uses a unique algorithm to account for the history dependence of ferroelectric capacitors, and the charge-voltage relationship, Q(v is described by a set of analytical functions with few parameters that can be easily extracted from electrical measurements of test capacitors. This model has been successfully implemented into SABER. Comparisons of simulation results with measurements show an outstanding predictive ability for arbitra voltage inputs. INTRODUCTI~N The growing interests in using ferroelectric materials in integrated circuits, especially in memory applications require accurate models for ferroelectric capacitors for circuit simulation and optimization. However, the Q-V (or C-v) relationships of ferroelectric capacitors are nonlinear and have nonlocal memories [1,2], i.e., the state of a capacitor is not uniquely determined by its present position on the Q-V plane, but also depends on voltage experienced at previous times. Most of the previous circuit models either do not [3,4] or incorrectly account for the history dependence [ 5 ] . Others require detailed information of microscopic material structure and complicated numerical analysis which is difficult to implement into a circuit simulator [6]. In this work, we found that the complex behavior of a ferroelectric capacitor is similar to that of Preisach hysteresis, widely used in the area of ferromagnetics [ 2 ] . We present a computationally efficient model that incorporates all of the major properties of Preisach hysteresis and correctly accounts for the history dependence of ferroelectric capacitor. For simplicity, time dependent effects such as polarization relaxation are neglected. THE MODEL A Preisach hysteresis is a macroscopic system that can be represented as a superposition of simple hysteresis units, and each unit has a rectangular hysteresis loop [2]. In the case of a ferroelectric thin film capacitor, it can be represented as a system of parallelly connected, non-interacting units as shown in Fig. 1. The switching charge 0, and the coercive voltages a and , B for each unit can be different, Let p(a ,B) describe the coercive voltage distribution, and D,p is the direction operator such that DCpV(t) = 1(-1) if the unit with coercive voltages (a,p) is switched to the positive (negative) polarity at time t . The total charge can then be written as Q ( t ) = Aa>P)fiapJ’(t)da@‘ (1) The Preisach type model can be numerically implemented by using Eq. 1. Although this approach is straightforward, it requires the numerical evaluation of double integrals in Eq. 1, which is a time-consuming procedure. In addition, the determination of the coercive voltage distribution p(a,,B) requires differentiations of experimentally obtained data. These differentiations may strongly amplify errors or noise inherently present in any experimental data. In this work, we present a method that incorporates the special properties of Preisach hysteresis while completely circumventing the above difficulties. Detailed studies of the Preisach type models and rigorous proofs of these properties can be found in [2]. For clarity, the linear contribution to the net charge is omitted in the discussion below. It can be easily included later by adding a linear capacitor C1 in parallel with the ferroelectric component. A. Saturation curve -An important property of Preisach hysteresis and ferroelectric hysteresis is the well defined saturation loop. Regardless of the previous history of the capacitor, the QV point must always lie on or within the saturation loop; and the magnitude of dQ/dV at any given Q-V point must be no greater than that of the saturation curve (of the same direction) at the same V. Let F f ( V ) and F & ( V ) denote the ascending and descending branch of the saturation loop respectively. They can take any functional form as long as they fit the experimental loop. The hyperbolic tangent is chosen here because it is simple, has the correct physical properties, and provides reasonable fit for most ferroelectric thin film capacitors, i.e., where Qs is the maximum charge contribution from ferroelectric switching, Vc+, (Vc) is the covercive voltage for the ascending curve (descending curve), and the parameter a describes how fast the hyperbolic tangent approaches ?Q,s (see Fig. 2). B. Memory Formation -Previous history of the capacitor is “remembered” by keeping track of the previous turning points on the Q-V plane. A turning point is where the Q-V curve changes direction or where dV/dt changes sign (see Fig. 3). The +(-) sign is used to distinguish the points where V ( t ) is a local maxima (minima). Although Preisach hysteresis has nonlocal memories, not all of its prior history needs to be “remembered”. For example, since the saturation loop is well defined, if a large voltage is applied across the capacitor such that its Q-V point is on the saturation curve, its behavior in the future no longer depends on its past history. To be more specific, only the alternating series of dominant input voltage extrema are important (see Fig. 4). Table 1 shows some examples of how the turning points in the memory are continuously being wiped out and updated. Because of this memory wiping-out property, the number of points that need to be stored generally does not grow continuously with time. By default, the end points of the saturated loop (m,QLy) and (-m,-Q&), denoted by S and -S respectively, are always the first two turning points stored in memory and are never wiped out. C. Inside the Saturation Loop -Once the Q-V point is inside the saturation loop, as the voltage is jncreased(decreased), the QV curve always passes through previous +(-) turning points stored in memory (see Fig. 5 ) . The Q-V curve connecting any two adjacent turning points ( v i , q , ) and ( ~ ~ + ~ , q ; + ~ ) , denoted by f i ? ( V ) or f, J ( V ) is given by where m, and b, are coefficients that need to be determined for each pair of turning points such that qi = m, F $ (v, ) + b, and q,+1 = mjF 2 (v,+l) + b, hold. It can be shown that F 1 (VI = Qs tanh[a(V V,, I] (2) f, $ ( V ) = m i F $ ( V + b / (3) 4; -q i+l F 1 (v, F 1 (vi+, m, = is always between 0 and 1. This means df, 1 idV I dF $ idV , or the magnitude of dQ/dV at any point inside the saturation loop is always a fraction of that of the saturation loop at the same V. SIMULATION RESULTS AND DISCUSSION Model simulations are compared with experimental data for 2000A SrBi,Ta,O, thin film capacitors experiencing complicated input voltage sequences (Figs. 6-8). The model parameters QS, Vc.+ , Vr-, U, and C/ are obtained from experimental measurements of the saturation loop. Unless otherwise specified, the model assumes the initial Q-V point to be on the saturation loop so that the only turning points in memory at the beginning are S and -S. For all cases, this model correctly describes the history dependence and memory formation of SBT capacitors. The predicted QV curves closely match the experimental data. 141 4-93081 3-75-1 /97 1997 Symposium on VLSl Technology Digest of Technical Papers REFERENCES Electrode I [ I ] B. Jiang, et al., Integrated Fenoelect., 1997, in press. [2] 1. 11. Mayergoyz, Mathematical Models of Hysteresis, Springer-Verlag New York, 1991. V [3] A. K. Kulkarni, et al., Ferroelect., 116 (1-2), p.95, 1991. Electrode 2 [4] D. E. Dunn, IEEE Trans. on Ultrasonics, Ferroelectrics, [5] S. L. Miller, et al., J. Appl. Phys. 70 ( 5 ) , p.2849, 1991. ,61 p, Zurcher, et Feroelect,, C and Frequency Control,41 (3), p.3, 1994. (4 p.205, 1995. Figure 1. (a) Preisach model applied to ferroelectric thin film capacitors. (b) The Q-V curve of eaLch unit has to lie on a rectangular loop. As the voltage is increased the ascending branch Figutt 2. The saturation curves, including only the contribution from ferroelectric dipole switchiing are described by Eq. 2. abcde is followed; as the voltage is decreased, the descending branch edfba is traced. The loop does not have to be symmetric with respect to OV. The total charge is the sum over all units. Figure 3. 0-V cuwe turning points. The extrema are stored in memory. All other input extrema example shows a capacitor %rting on the are wiped out. For the particular pulse train shown, at _ , _ % saturation loop and passing through a, b, C, d. time To, the voltage extrema stored in memory are turnin:! points a, 6, c, d. After reaching d, as the volt@e is decreased) the Qcurve passes through again? then a, and The Table 1. Examples illustrating the memory wipingout property. The voltage extrema experienced by -' . The Q-' the ferroelectric capacitor in time are listed from top to bottom. The voltages stored in the model are erased in pairs. Each new local maxima erases the previous local maxima of equal or lesser value and its following local minima: each new local minima erases the urevious local minima ofeaual or greater cay and a-S are given by Eq. 3. are determined m i and ' i in Eq, 5 4 3 2 1 0 1 2 3 4 5 Voltage (V) Figure 6 Comparison between (d) measurement and (t,) model prediction when applied pulse sequency IS SV, -5V, ( 0 SV, -0 SV)xn, -5V, and 5V The Q-Vcurve traces a, b, (c, dxn, 6, a value and i t s following lo& maxima. The entries 2 0 1 I I I I I I I I I that erased previous memories are shown in &Id. 201 1 1 1 1 1 1 1 1 1 I