功率横向DMOS晶体管测试结构

ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures Pub Date : 1993-03-22 DOI:10.1109/ICMTS.1993.292897

S. Hidalgo, J. Fernandez, P. Godignon, J. Rebollo, J. Millán

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引用次数: 5

摘要

讨论了LDMOS测试结构的设计和制作。研究了电池尺寸和脱膜性能对器件特性的影响，并对V/sub / BR//R/sub on /权衡进行了优化。利用这些试验结构，研究了器件布局、边缘器件端接和几何尺寸对实验结果的影响。在测试监控芯片中考虑了方形、圆形、单指、多指和波形门的布局。制造工艺是基于双扩散形成有源沟道的传统多栅极双扩散MOS (DMOS)工艺。采用二维仿真的方法分析了填充后的LDMOS的物理行为。所得结果与实验数据进行了比较。

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Power lateral DMOS transistor test structures

The design and the fabrication of LDMOS test structures are discussed. The impact of cell dimensions and epilayer properties on the device characteristics is shown, together with the optimization of V/sub BR//R/sub ON/ trade-off. The influence of device layout, edge device termination and geometrical dimensions are investigated with these test structures. Square, circular, single-finger, multi-finger, and waved gate layouts are considered in the test monitor chip. The fabrication process is a conventional poly-gate double diffusion MOS (DMOS) process based on a double diffusion for the active channel formation. The resurfed LDMOS physical behavior is analyzed by means of 2D simulations. The results obtained are compared with experimental data.<>

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ICMTS 93 Proceedings of the 1993 International Conference on Microelectronic Test Structures

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