利用功能测试抽象在EDA上自动生成系统级功能测试程序

Motoo Ueda, Shinichi Ishikawa, Masaru Goishi, Satoru Kitagawa, Hiroshi Araki, Shuichi Inage
{"title":"利用功能测试抽象在EDA上自动生成系统级功能测试程序","authors":"Motoo Ueda, Shinichi Ishikawa, Masaru Goishi, Satoru Kitagawa, Hiroshi Araki, Shuichi Inage","doi":"10.1109/TEST.2012.6401590","DOIUrl":null,"url":null,"abstract":"This paper introduces new capability on System on a Chip (SoC) ATE, called \"Functional Test Abstraction (FTA)\", which allows us to execute an automatically generated system level functional test program from the system level design verification environment. The device under verification and device under test can be a complex SoC which has multiple logic time domains and multiple interfaces of the same or different types.","PeriodicalId":353290,"journal":{"name":"2012 IEEE International Test Conference","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-11-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Automated system level functional test program generation on ATE from EDA using Functional Test Abstraction\",\"authors\":\"Motoo Ueda, Shinichi Ishikawa, Masaru Goishi, Satoru Kitagawa, Hiroshi Araki, Shuichi Inage\",\"doi\":\"10.1109/TEST.2012.6401590\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper introduces new capability on System on a Chip (SoC) ATE, called \\\"Functional Test Abstraction (FTA)\\\", which allows us to execute an automatically generated system level functional test program from the system level design verification environment. The device under verification and device under test can be a complex SoC which has multiple logic time domains and multiple interfaces of the same or different types.\",\"PeriodicalId\":353290,\"journal\":{\"name\":\"2012 IEEE International Test Conference\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-11-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE International Test Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TEST.2012.6401590\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE International Test Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TEST.2012.6401590","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

本文介绍了片上系统(SoC) ATE的新功能,称为“功能测试抽象(FTA)”,它允许我们从系统级设计验证环境中执行自动生成的系统级功能测试程序。被验证器件和被测试器件可以是一个复杂的SoC,具有多个逻辑时域和多个相同或不同类型的接口。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Automated system level functional test program generation on ATE from EDA using Functional Test Abstraction
This paper introduces new capability on System on a Chip (SoC) ATE, called "Functional Test Abstraction (FTA)", which allows us to execute an automatically generated system level functional test program from the system level design verification environment. The device under verification and device under test can be a complex SoC which has multiple logic time domains and multiple interfaces of the same or different types.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信