叠模器件中电阻性短路的案例研究

2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA) Pub Date : 2018-07-01 DOI:10.1109/IPFA.2018.8452603

Ke-Ying Lin, Yu Chi Wang

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引用次数: 0

摘要

在高加速应力测试(HAST)后，在堆叠芯片器件中检测到电阻性短IV曲线。采用非破坏性故障隔离技术——锁定热成像技术(LIT)对完整封装的上模进行故障定位。随后，进行了背面样品制备和物理失效分析(PFA)，揭示了导致故障的模具裂纹问题。

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Case Study of a Resistive Short in a Stacked-Die Device

A resistive short IV curve was detected in a stacked-die device after a highly accelerated stress test (HAST). Lock-in thermography (LIT), a non-destructive fault isolation technique, was applied to localize the fault location in the top die of the intact package. Thereafter, backside sample preparation and physical failure analysis (PFA) were performed and revealed the die crack issue causing the fault.

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2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)

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