基于叠片倒装芯片的测试封装优化

J. Pohl, M. Graml, Peter Strobel, Rainer Steiner, Klaus Pressel, S. Stoeckl, Gerald Ofner, Charles Lee
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引用次数: 3

摘要

我们报告了一个基于倒装芯片的堆叠芯片阵列测试封装优化的案例研究。我们论证了封装衬底设计和衬底厚度对可加工性和封装翘曲控制的重要性。我们发现,对于薄衬底铜平衡的上下模具是至关重要的。我们展示了倒装芯片芯片厚度和衬底厚度对堆栈中顶部芯片的芯片附着的影响。通过对不同顶模贴装方案的研究表明,胶带贴装具有一定的优越性。我们展示了垂直堆叠结构(即倒装芯片厚度)和材料选择(即模具化合物)对封装整体翘曲控制的重要性。结果表明,即使封装结构的微小变化也会对堆叠封装的翘曲特性产生很大的影响
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Package optimization of a stacked die flip chip based test package
We report a case study for the optimization of a flip chip based stacked die array test package. We demonstrate the importance of package substrate design and substrate thickness on the processibility and package warpage control. We found that for thin substrates copper balancing of the top and bottom die is crucial. We show the impact of flip chip die thickness and substrate thickness on the die attach of the top die(s) in the stack. Investigations on different top die attach alternatives show that tape die attach can have advantages. We demonstrate the importance of the vertical stack structure (i.e. flip chip thickness) and material selection (i.e. mold compound) on the overall warpage control of the package. The results show that even small changes in the package structure can have large impact on the warpage characteristics of the stacked die package
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