等离子体薄化键合SOI晶圆的材料特性

T. Feng, M. Matloubian, D. Mathur, P.B. Mumola, G. Gardopee
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引用次数: 1

摘要

采用栅极氧化击穿法测定等离子体薄化硅片的硅表面质量。在未加工的块状硅片和等离子体薄硅片上制备了热氧化物为190a的圆形MOS电容器。给出了在体硅晶片和等离子体薄体硅晶片上制备的直径为250-/spl mu/m的MOS电容器的栅极氧化物击穿电压分布。击穿分布之间的相似性表明,AcuThin晶圆减薄过程不会降低Si表面质量。基于这些和其他即将提出的结果,我们相信这种等离子体蚀刻工艺不会造成任何可能对器件性能产生不利影响的表面或亚表面损伤,也就是说,它保留了硅材料的整体质量
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Material properties of plasma-thinned bonded SOI wafers
Gate-oxide breakdown measurements were made to determine the quality of the Si surface of plasma-thinned Si wafers. Circular MOS capacitors having a thermal oxide of 190 A were fabricated on unprocessed bulk Si wafers and plasma-thinned wafers. The distribution of gate-oxide breakdown voltages for 250-/spl mu/m diameter MOS capacitors fabricated on a bulk Si wafer and on a plasma-thinned bulk Si wafer are shown. The similarity between the breakdown distributions is an indication that the AcuThin wafer thinning process does not degrade the Si surface quality. Based on these and other results to be presented, we believe that this plasma etching process for thinning bonded Si wafers does not cause any surface or subsurface damage which could adversely impact device performance, i.e., it preserves the bulk silicon material qualities.<>
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