高性能计算处理器安全故障率的测量研究

2020 IEEE International Test Conference (ITC) Pub Date : 2020-11-01 DOI:10.1109/ITC44778.2020.9325239

R. Bramley, Yanxiang Huang, Guangshan Duan, N. Saxena, Paul Racunas

{"title":"高性能计算处理器安全故障率的测量研究","authors":"R. Bramley, Yanxiang Huang, Guangshan Duan, N. Saxena, Paul Racunas","doi":"10.1109/ITC44778.2020.9325239","DOIUrl":null,"url":null,"abstract":"Accurate determination of the safe-fault failure rate of complex digital designs is an exascale problem. We present a novel measurement methodology and results which could have a profound impact on the performance and availability for GPUs in safety critical systems. We extend our analysis with a methodology for in-the-field verification.","PeriodicalId":251504,"journal":{"name":"2020 IEEE International Test Conference (ITC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"On the Measurement of Safe Fault Failure Rates in High-Performance Compute Processors\",\"authors\":\"R. Bramley, Yanxiang Huang, Guangshan Duan, N. Saxena, Paul Racunas\",\"doi\":\"10.1109/ITC44778.2020.9325239\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Accurate determination of the safe-fault failure rate of complex digital designs is an exascale problem. We present a novel measurement methodology and results which could have a profound impact on the performance and availability for GPUs in safety critical systems. We extend our analysis with a methodology for in-the-field verification.\",\"PeriodicalId\":251504,\"journal\":{\"name\":\"2020 IEEE International Test Conference (ITC)\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE International Test Conference (ITC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ITC44778.2020.9325239\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE International Test Conference (ITC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ITC44778.2020.9325239","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 2

摘要

准确确定复杂数字设计的安全故障故障率是一个百亿亿级问题。我们提出了一种新的测量方法和结果，这可能对安全关键系统中gpu的性能和可用性产生深远的影响。我们用实地验证的方法扩展了我们的分析。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

On the Measurement of Safe Fault Failure Rates in High-Performance Compute Processors

Accurate determination of the safe-fault failure rate of complex digital designs is an exascale problem. We present a novel measurement methodology and results which could have a profound impact on the performance and availability for GPUs in safety critical systems. We extend our analysis with a methodology for in-the-field verification.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2020 IEEE International Test Conference (ITC)

自引率

0.00%

发文量