{"title":"了解微处理器动态故障隔离测试","authors":"V. Ravikumar","doi":"10.1109/IPFA.2016.7564238","DOIUrl":null,"url":null,"abstract":"Dynamic Fault Isolation is a very important step in the Failure Analysis process flow of VLSI circuits over the last decade. Key factors in successful dynamic FI include understanding the test methodology, knowledge of the design for test (DFT) features such as BIST and SCAN, and in interpretation of the fault isolation signals. The invited talk will also discuss a few recent advances that help with the challenges of dynamic fault isolation.","PeriodicalId":206237,"journal":{"name":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Understanding testing for dynamic fault isolation of microprocessors\",\"authors\":\"V. Ravikumar\",\"doi\":\"10.1109/IPFA.2016.7564238\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Dynamic Fault Isolation is a very important step in the Failure Analysis process flow of VLSI circuits over the last decade. Key factors in successful dynamic FI include understanding the test methodology, knowledge of the design for test (DFT) features such as BIST and SCAN, and in interpretation of the fault isolation signals. The invited talk will also discuss a few recent advances that help with the challenges of dynamic fault isolation.\",\"PeriodicalId\":206237,\"journal\":{\"name\":\"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-07-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IPFA.2016.7564238\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE 23rd International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IPFA.2016.7564238","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Understanding testing for dynamic fault isolation of microprocessors
Dynamic Fault Isolation is a very important step in the Failure Analysis process flow of VLSI circuits over the last decade. Key factors in successful dynamic FI include understanding the test methodology, knowledge of the design for test (DFT) features such as BIST and SCAN, and in interpretation of the fault isolation signals. The invited talk will also discuss a few recent advances that help with the challenges of dynamic fault isolation.