{"title":"记忆体热监测","authors":"V. Székely, B. Courtois","doi":"10.1109/MTDT.1996.782497","DOIUrl":null,"url":null,"abstract":"3D packaging of memories, downscaling of the memory chips populating these packages, make thermal issues more and more serious. The goal of this paper is to propose means to detect potential problems and to suggest how to include these mechanisms in the general framework of the design of such systems.","PeriodicalId":228146,"journal":{"name":"IEEE International Workshop on Memory Technology, Design and Testing,","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-08-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Thermal monitoring of memories\",\"authors\":\"V. Székely, B. Courtois\",\"doi\":\"10.1109/MTDT.1996.782497\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"3D packaging of memories, downscaling of the memory chips populating these packages, make thermal issues more and more serious. The goal of this paper is to propose means to detect potential problems and to suggest how to include these mechanisms in the general framework of the design of such systems.\",\"PeriodicalId\":228146,\"journal\":{\"name\":\"IEEE International Workshop on Memory Technology, Design and Testing,\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-08-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE International Workshop on Memory Technology, Design and Testing,\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MTDT.1996.782497\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Workshop on Memory Technology, Design and Testing,","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MTDT.1996.782497","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
3D packaging of memories, downscaling of the memory chips populating these packages, make thermal issues more and more serious. The goal of this paper is to propose means to detect potential problems and to suggest how to include these mechanisms in the general framework of the design of such systems.
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